linux.git
7 years agoMLK-17275-3: drm/bridge: nwl-dsi: Fix remove/detach
Robert Chiras [Thu, 21 Dec 2017 09:06:44 +0000 (11:06 +0200)]
MLK-17275-3: drm/bridge: nwl-dsi: Fix remove/detach

Add a check in detach function, so that the mipi_dsi_host_unregister
will occur only if the host was registered.
Also, remove the unnecessary calls to host_unregister from probe and
remove functions.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17275-2: drm/bridge: it6263: Add support for OF_DYNAMIC
Robert Chiras [Thu, 21 Dec 2017 09:04:22 +0000 (11:04 +0200)]
MLK-17275-2: drm/bridge: it6263: Add support for OF_DYNAMIC

When CONFIG_OF_DYNAMIC is used, and this driver is enabled in
devicetree, but fails to probe a physical i2c client, it should disable
it's remote endpoint, so that the DRM master device won't fail to bind
the other available devices.
Usually, the remote endpoint of this device is a DRM encoder. If a DRM
encoder fails to bind, the DRM master device will also fail to bind.
This is why, we should disable the encoder node dynamically in
devicetree.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17275-1: drm/bridge: adv7511: Add support for OF_DYNAMIC
Robert Chiras [Thu, 21 Dec 2017 08:59:20 +0000 (10:59 +0200)]
MLK-17275-1: drm/bridge: adv7511: Add support for OF_DYNAMIC

When CONFIG_OF_DYNAMIC is used, and this driver is enabled in
devicetree, but fails to probe a physical i2c client, it should disable
it's remote endpoint, so that the DRM master device won't fail to bind
the other available devices.
Usually, the remote endpoint of this device is a DRM encoder. If a DRM
encoder fails to bind, the DRM master device will also fail to bind.
This is why, we should disable the encoder node dynamically in
devicetree.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17363-2 imx8: pm-domain: clocks list should be initialized only once.
Ranjani Vaidyanathan [Wed, 10 Jan 2018 17:52:54 +0000 (11:52 -0600)]
MLK-17363-2 imx8: pm-domain: clocks list should be initialized only once.

The clocks list associated with a PD is the same across all devices
attached to the same PD. Re-initializing it each time a new device is
attached results in missing some clocks.

[ Aisheng: "Improve commit message" ]

Reviewed-by: Anson Huang <anson.huang@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
7 years agoMLK-17363-1 imx8: pm-domain: fix clock parent restore issue after suspend/resume
Ranjani Vaidyanathan [Wed, 10 Jan 2018 17:51:26 +0000 (11:51 -0600)]
MLK-17363-1 imx8: pm-domain: fix clock parent restore issue after suspend/resume

Currently the clock parent actually is failed to be restored in power
domain driver due to the set_parent will bail out early as the clk core
already cached the same old parent.

Implement a CLK_SET_PARENT_NOCACHE flag in clk core and register all
SC mux clocks with this flag to make sure the clk core won't bypass
the SC clock parent setting.

[ Aisheng: "Add commit message" ]

Reviewed-by: Anson Huang <anson.huang@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
7 years agoMLK-17280-2: arm64: dts: fsl-imx8qxp-mek: Add DSI panel reset-gpio
Robert Chiras [Fri, 5 Jan 2018 09:59:01 +0000 (11:59 +0200)]
MLK-17280-2: arm64: dts: fsl-imx8qxp-mek: Add DSI panel reset-gpio

Add the reset-gpio property for the DSI panels so that power ON/OFF can
work properly.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17280-1: drm: panel: rm67191: Fix power on sequence
Robert Chiras [Fri, 5 Jan 2018 11:41:44 +0000 (13:41 +0200)]
MLK-17280-1: drm: panel: rm67191: Fix power on sequence

According to the vendor driver sample there is a sleep after the exit
sleep and display on commands, but it seems that these sleeps are only
causing stability issues when the display signal is sent to the panel,
so remove them.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMGS-3565 [#ccc] fix coverity issue 1477294
Yuchou Gan [Wed, 10 Jan 2018 18:14:44 +0000 (02:14 +0800)]
MGS-3565 [#ccc] fix coverity issue 1477294

unmap_attachment to free the sg_table when failed to call _DmabufAttach

Date: Jan 10, 2018
Signed-off-by: Yuchou Gan<yuchou.gan@nxp.com>
7 years agoMLK-17355-1: ASoC: fsl_mqs: Fix potential uninitialized pointer read
Viorel Suman [Tue, 9 Jan 2018 14:01:49 +0000 (16:01 +0200)]
MLK-17355-1: ASoC: fsl_mqs: Fix potential uninitialized pointer read

Initialize gpr_np in order to avoid potential unitialized
pointer read in the section following the "out:" label.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
7 years agoMLK-17311-5 drm/imx: dpu: Configure prefetch for dpu blit
Meng Mingming [Wed, 27 Dec 2017 02:30:51 +0000 (10:30 +0800)]
MLK-17311-5 drm/imx: dpu: Configure prefetch for dpu blit

Configure prefetch with source frame info for dpu blit.

Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
7 years agoMLK-17311-4 gpu: imx: dpu: Configure dprc to enable prefetch
Meng Mingming [Wed, 27 Dec 2017 02:29:00 +0000 (10:29 +0800)]
MLK-17311-4 gpu: imx: dpu: Configure dprc to enable prefetch

Configure dprc to enable prefetch for dpu blit.

Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
7 years agoMLK-17311-3 drm,imx: Add struct drm_imx_dpu_frame_info
Meng Mingming [Wed, 27 Dec 2017 02:17:52 +0000 (10:17 +0800)]
MLK-17311-3 drm,imx: Add struct drm_imx_dpu_frame_info

Add struct drm_imx_dpu_frame_info.

Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
7 years agoMLK-17311-2 gpu: imx: imx8_dprc: No need to round up height to 64
Meng Mingming [Wed, 27 Dec 2017 02:11:36 +0000 (10:11 +0800)]
MLK-17311-2 gpu: imx: imx8_dprc: No need to round up height to 64

It's necessary to make DPR baddr lie on the alignment block,
but no need to round up height to 64.

Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
7 years agoMLK-17311-1 gpu: imx: dpu: common: Set SC_C_KACHUNK_CNT as 32
Meng Mingming [Wed, 27 Dec 2017 01:52:09 +0000 (09:52 +0800)]
MLK-17311-1 gpu: imx: dpu: common: Set SC_C_KACHUNK_CNT as 32

The SC_C_KACHUNK_CNT is for dpu blit and represents
how many cycle counts is need to trigger DPR after
DPU shadow being loaded. The initial value is 0x20,
and will change to 0 after the first frame if not set.
So it need be set with a value greater than 0x20.

Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
7 years agoMLK-17341-6: dts: update mipi csi i2c power domain name
Sandor Yu [Mon, 8 Jan 2018 03:57:31 +0000 (11:57 +0800)]
MLK-17341-6: dts: update mipi csi i2c power domain name

Update mipi csi i2c power domain name.

Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17341-5: imx8x: Rename imx8 mipi csi i2c power domain
Sandor Yu [Mon, 8 Jan 2018 03:55:33 +0000 (11:55 +0800)]
MLK-17341-5: imx8x: Rename imx8 mipi csi i2c power domain

Rename imx8x mipi csi i2c power domain.

Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17341-4: clk: Rename mipi csi i2c power domain name
Sandor Yu [Mon, 8 Jan 2018 03:53:51 +0000 (11:53 +0800)]
MLK-17341-4: clk: Rename mipi csi i2c power domain name

rename mipi csi i2c power domain name

Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17341-3: dts: Add power up pin for imx8qxp
Sandor Yu [Thu, 4 Jan 2018 11:00:39 +0000 (19:00 +0800)]
MLK-17341-3: dts: Add power up pin for imx8qxp

Add gpio0_mipi_csi0 propriety.
Add power up pin for max9286.

Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17341-2: dts: Add mipi csi gpio propriety
Sandor Yu [Thu, 4 Jan 2018 09:20:27 +0000 (17:20 +0800)]
MLK-17341-2: dts: Add mipi csi gpio propriety

Add mipi csi0/csi1 GPIO propriety.
Add pinctrl setting for mipi_csi0/1 GPIO.
Add power up pin for max9286.

Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17341-1: max9286: Add power up pin setting
Sandor Yu [Thu, 4 Jan 2018 09:19:51 +0000 (17:19 +0800)]
MLK-17341-1: max9286: Add power up pin setting

Add power up pin setting for max9286 driver.

Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17312-5 usb: cdns3: improve the role switch process
Peter Chen [Tue, 2 Jan 2018 06:45:15 +0000 (14:45 +0800)]
MLK-17312-5 usb: cdns3: improve the role switch process

Current design tries to switch role no matter it is a dual-role device
or a single-role device. It produces extra switch process, and have an
error message at console when tries to start a non-exist role.

In this commit, we do below changes
- The role switch work queue is only for dual-role or peripheral-only
device.
- For peripheral-only device, we need to switch role to CDNS3_ROLE_END
since we need to close vbus and turn off clocks at this role when the
cable is disconnected from the host; And we do noop when the external
cable indicates we are host.

Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-17312-4 usb: cdns3: gadget: fix the recognition issue when connection before...
Peter Chen [Fri, 29 Dec 2017 08:43:59 +0000 (16:43 +0800)]
MLK-17312-4 usb: cdns3: gadget: fix the recognition issue when connection before load module

At imx8qm/imx8qxp A0 chip, there is a vbus toggle issue, so we need to
force the vbus as high before connection, otherwise, there will be endless
connect/disconnect interrupts for USB2 and causes enumeration failure.
The current work flow only cover this during the role switch, but omit
it when the connection has established at module probe routine.

This patch fixes it by moving force vbus operation to cdns_set_role to
cover both static and dynamic recognition issue.

Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-17312-3 usb: cdns3: gadget: configure all endpoints before set configuration
Peter Chen [Wed, 27 Dec 2017 09:00:22 +0000 (17:00 +0800)]
MLK-17312-3 usb: cdns3: gadget: configure all endpoints before set configuration

Cadence IP has one limitation that all endpoints must be configured
(Type & MaxPacketSize) before setting configuration through hardware
register, it means we can't change endpoints configuration after
set_configuration.

In this patch, we add non-control endpoint through usb_ss->ep_match_list,
which is added when the gadget driver uses usb_ep_autoconfig to configure
specific endpoint; When the udc driver receives set_configurion request,
it goes through usb_ss->ep_match_list, and configure all endpoints
accordingly.

At usb_ep_ops.enable/disable, we only enable and disable endpoint through
ep_cfg register which can be changed after set_configuration, and do
some software operation accordingly.

Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-17312-2 usb: cdns3: gadget: improve comments
Peter Chen [Wed, 27 Dec 2017 03:22:27 +0000 (11:22 +0800)]
MLK-17312-2 usb: cdns3: gadget: improve comments

Fix typos and some error comments

Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-17312-1 usb: cdns3: gadget: prepare setup packet buffer before receiving it
Peter Chen [Wed, 27 Dec 2017 03:09:11 +0000 (11:09 +0800)]
MLK-17312-1 usb: cdns3: gadget: prepare setup packet buffer before receiving it

At current setup packet handling flow, the setup packet buffer
is only prepared after the controller receives the setup packet,
then stores it at its internal buffer, and trigger DESCMIS interrupt
(Transfer descriptor missing) to prepare TRB for it.

The shortcoming of this design is there is an extra DESCMIS interrupt,
and consume more time on enumeration process. As an improvement,
we parepare setup buffer beforehand, it is prepared at below situations:
- After bus reset has finished.
- For non-data stage setup transfers, prepare it before sending ACK for
status stage.
- For data stage setup transfers, prepare it after data stage but
before sending ACK for status stage.

Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-17344-2: ARM64: dts: add constraint-rate for hdmi of imx8qm
Shengjiu Wang [Fri, 5 Jan 2018 05:14:52 +0000 (13:14 +0800)]
MLK-17344-2: ARM64: dts: add constraint-rate for hdmi of imx8qm

In imx8qm the hdmi audio sound is breaking from time to time, the
reason is that the DPLL jitter issue cause that HDMI can't lock
this clock internally, that some audio data is dropped. It is
hardware issue, here we add software workaround.

We tried two method:
1. Changed Audio PLL setting to use non-fractional multiplier
(768MHz=24MHz*32). This setting is significantly improving HDMI Audio
but audio is still breaking from time to time.
2. Generated HDMI TX audio clock from external audio codec
(24MHz clock => SLSlice[0] => MCLKOUT => External CODEC ref clock to PLL
=> ESAI Audio clock => loopback to HDMI TX SAI => HDMI TX).
HDMI TX audio is clear.

The second method depends on external codec, for we want to keep
the independence of driver, so we use the method 1.

For method 1, we need to set a dedicate rate for HDMI, we use the
AUDIO_PLL1, but which is conflict with AMIX, so we disable AMIX in
hdmi dts and only support 48kHz for HDMI audio

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
7 years agoMLK-17344-1: ASoC: imx-cdnhdmi: get constraint rate from dts
Shengjiu Wang [Fri, 5 Jan 2018 05:14:15 +0000 (13:14 +0800)]
MLK-17344-1: ASoC: imx-cdnhdmi: get constraint rate from dts

Constraint rate depends on the clock rata of cpu dai, which is
defined in dts, so we add constraint-rate property in dts, then
driver can get it.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
7 years agoMLK-17258 ARM64: dts: add off-on-delay for usdhc vmmc-supply regulator
Haibo Chen [Fri, 22 Dec 2017 03:27:35 +0000 (11:27 +0800)]
MLK-17258 ARM64: dts: add off-on-delay for usdhc vmmc-supply regulator

For the slot support SD3.0 card, during system suspend, if plug out
the sd card, and insert another SD3.0 card, after system resume back,
SD3.0 card can't be recognized as SD3.0 card, just SD2.0 card.

This is because the time delay between vmmc regulator off and on is
too small. SD spec require the Card Vdd shall be lowered to less than
0.5v for a minimum period for 1ms. And the hardware regulator also need
some time to drop the Card Vdd from 3.3v to 0.5v. This patch add the
off-on-delay in vmmc-supply regulator adding the upper two limitation
into consideration.

This patch relay on the commit 878bff7648f5 ("MLK-14638-1 regulator:
fixed: add off_on_delay support").

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
7 years agoMLK-17334: imx8: pm-domains: fix array overflow issue
Shengjiu Wang [Wed, 3 Jan 2018 10:22:03 +0000 (18:22 +0800)]
MLK-17334: imx8: pm-domains: fix array overflow issue

When the resource id is larger than 512, the wakeup_rsrc_id array
will overflow, then the resource may always power on.
So align the IRQ with resource number to fix the issue.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
7 years agoMLK-17309-4: ASoC: fsl_hifi: fix crash issue when destination not align
Weiguang Kong [Tue, 26 Dec 2017 10:50:31 +0000 (18:50 +0800)]
MLK-17309-4: ASoC: fsl_hifi: fix crash issue when destination not align

When loading the codec libs in driver, if the destination is
not 4-bytes alignment when doing memset_hifi(), the driver
will print a warning message and the driver may crash in some
cases.

So by changing the memset() function and aligning the virtual address
based on the physical address to fix this issue.

Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
7 years agoMLK-17309-3: ASoC: fsl_hifi: get free memory from hifi framework
Weiguang Kong [Tue, 26 Dec 2017 10:37:14 +0000 (18:37 +0800)]
MLK-17309-3: ASoC: fsl_hifi: get free memory from hifi framework

In order to manage the memory simply, all the memory which is
shared between hifi driver and hifi framework are managed by
hifi framework.

So when the driver wants to get free memory, it can send
"ICM_PI_LIB_MEM_ALLOC" command to hifi framework, then hifi
framework will return the address of available memory to
driver. When the driver wants to release the memory, it can
send "ICM_PI_LIB_MEM_FREE" command to hifi framework, the hifi
framework will mark this memory available.

Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
7 years agoMLK-17309-2: ASoC: fsl_hifi: use new way to realize multi-codec
Weiguang Kong [Tue, 26 Dec 2017 10:57:27 +0000 (18:57 +0800)]
MLK-17309-2: ASoC: fsl_hifi: use new way to realize multi-codec

In current hifi driver, some resources are shared when multi
codec decodes together. When switching between multi-codec,
the hifi driver and framework need to save and restore the shared
resources,this will waster time and complicate the hifi driver.

So by distributing private resources for each codec to avoid
this problem. When the user space wants to enable a new codec,
it can send "HIFI4_CLIENT_REGISTER" command to hifi driver to apply
an available resource, the driver will send a client id to
user space. When the user space wants to release the resource,
it can send "HIFI4_CLIENT_UNREGISTER" command to hifi driver,
then the driver will mark this resource available.

Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
7 years agoMLK-17309-1: uapi: mxc_hifi4: provide new interface for user space
Weiguang Kong [Tue, 26 Dec 2017 10:57:10 +0000 (18:57 +0800)]
MLK-17309-1: uapi: mxc_hifi4: provide new interface for user space

In order to avoid license problem of Cadence header files, these
license files has been wrappered into a library and new interface
has been abstracted to replace the interface of Cadence header
files.

So update the mxc_hifi4.h file to provide new interface for
user space to use.

Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
7 years agoMLK-17332: ARM: imx: pm-rpmsg: remove workqueue delay
Robin Gong [Wed, 3 Jan 2018 05:51:59 +0000 (13:51 +0800)]
MLK-17332: ARM: imx: pm-rpmsg: remove workqueue delay

With the latest M4 image on i.mx7ULP, which assume life cycle rpmsg is the
first channel sending message during AP bootup, we should remove the delay
timing window which other rpmsg channel may fall in, otherwise, such rpmsg
channel may probe failed as pf1550 regulator rpmsg driver.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Tested-by: Anson Huang <Anson.Huang@nxp.com>
7 years agoMA-10971 [8M-EVK]system cannot resume with mipi display
guoyin.chen [Thu, 28 Dec 2017 13:20:45 +0000 (21:20 +0800)]
MA-10971 [8M-EVK]system cannot resume with mipi display

In andorid UI framework, we will send DRM_MODE_DPMS_OFF
to drm driver before we request kernel into suspend sate
And send DRM_MODE_DPMS_ON after we resume kernel. mxsfb_resume
should just recover the sate before kernel into suspend.
Otherwise the mxsfb->connector is reset for DRM_MODE_DPMS_OFF,
mxsfb drm driver have below kernel panic when resuming from suspend

Unable to handle kernel NULL pointer dereference at virtual address 000000f4
pgd = ffff8000aa8ea000
[000000f4] *pgd=00000000ea8e9003, *pud=00000000ea4d6003, *pmd=0000000000000000
Internal error: Oops: 96000006 [#1] PREEMPT SMP
Modules linked in: ath10k_pci ath10k_core ath
CPU: 2 PID: 2693 Comm: system_server Not tainted 4.9.68-00922-g707b2da-dirty #35
Hardware name: Freescale i.MX8MQ EVK (DT)
task: ffff8000b92d1b00 task.stack: ffff8000aad60000
PC is at mxsfb_crtc_enable+0xa4/0x538
LR is at mxsfb_crtc_enable+0x4dc/0x538
[<ffff00000871b5cc>] mxsfb_crtc_enable+0xa4/0x538
[<ffff00000871a6fc>] mxsfb_resume+0x68/0x84
[<ffff000008725f08>] platform_pm_resume+0x24/0x4c
[<ffff00000873271c>] dpm_run_callback+0x40/0x1f0
[<ffff0000087336b0>] device_resume+0xac/0x284
[<ffff000008734bec>] dpm_resume+0x11c/0x374
[<ffff00000873526c>] dpm_resume_end+0x14/0x28
[<ffff00000811e558>] suspend_devices_and_enter+0x134/0x2f8
[<ffff00000811ead0>] pm_suspend+0x3b4/0x678
[<ffff00000811ceec>] state_store+0x80/0x9c
[<ffff000008445068>] kobj_attr_store+0x14/0x24
[<ffff0000082c51d8>] sysfs_kf_write+0x40/0x50
[<ffff0000082c43e0>] kernfs_fop_write+0xb0/0x1e0
[<ffff000008242708>] vfs_write+0xac/0x1d0
[<ffff000008243be4>] SyS_write+0x50/0xb0
[<ffff000008082ef0>] el0_svc_naked+0x24/0x28

Change-Id: Ia2c4d0ef42e4a2761209fd678ace35804b40a387
Signed-off-by: guoyin.chen <guoyin.chen@nxp.com>
7 years agoMLK-17320 arm: imx: update copyright for i.mx7ulp
Anson Huang [Wed, 27 Dec 2017 19:17:54 +0000 (03:17 +0800)]
MLK-17320 arm: imx: update copyright for i.mx7ulp

Correct copyright issue introduced by commit:
(468f38d MLK-17317 arm: imx: add no_console_suspend
support for i.mx7ulp vlls mode)

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
7 years agoMLK-17317 arm: imx: add no_console_suspend support for i.mx7ulp vlls mode
Anson Huang [Wed, 27 Dec 2017 16:54:19 +0000 (00:54 +0800)]
MLK-17317 arm: imx: add no_console_suspend support for i.mx7ulp vlls mode

LPUART driver currently turns off clocks during device
suspend phase, but in i.MX7ULP platform low level suspend
routine, lpuart will be saved/restored during suspend/resume,
to avoid system hang caused by accessing lpuart registers
without clocks enable, add console_suspend_enabled check for
lpuart register save/restore.

SCG1 SOSCDIV register needs to be saved/restored anyway,
move it to asm code, all SCG1 registers will be restored
there.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Rviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agodrm: Pass CRTC ID in userspace vblank events
Ander Conselvan de Oliveira [Tue, 4 Apr 2017 16:52:21 +0000 (17:52 +0100)]
drm: Pass CRTC ID in userspace vblank events

With the atomic API, it is possible that a single commit affects
multiple crtcs. If the user requests an event with that commit, one
event will be sent for each CRTC, but it is not possible to distinguish
which crtc an event is for in user space. To solve this, the reserved
field in struct drm_vblank_event is repurposed to include the crtc_id
which the event is for.

The DRM_CAP_CRTC_IN_VBLANK_EVENT is added to allow userspace to query if
the crtc field will be set properly.

[daniels: Rebased, using Maarten's forward-port.]

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170404165221.28240-2-daniels@collabora.com
7 years agoMLK-17314-3 arm: dts: imx7ulp: update nmi irq number
Anson Huang [Wed, 27 Dec 2017 14:26:44 +0000 (22:26 +0800)]
MLK-17314-3 arm: dts: imx7ulp: update nmi irq number

On i.MX7ULP B0 chip, NMI irq number is changed,
update it to make VLLS/VLPS work.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17314-2 arm: imx: fix build warning
Anson Huang [Wed, 27 Dec 2017 12:25:58 +0000 (20:25 +0800)]
MLK-17314-2 arm: imx: fix build warning

Fix build warning introduced by below commit:
(556d2d5 MLK-16750-5: arm: imx: support using psci to handle power stuff)

arch/arm/mach-imx/pm-imx7ulp.c: In function 'imx7ulp_pm_common_init':
arch/arm/mach-imx/pm-imx7ulp.c:747:17: warning:
'sram_paddr' may be used uninitialized in this function [-Wuninitialized]

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17314-1 arm: imx: remove snvs pcc save/restore
Anson Huang [Wed, 27 Dec 2017 11:06:05 +0000 (19:06 +0800)]
MLK-17314-1 arm: imx: remove snvs pcc save/restore

On i.MX7ULP B0, SNVS is located in M4 domain, remove
snvs pcc save/restore to avoid imprecise abort after
resume:

Restarting tasks ... Unhandled fault:
imprecise external abort (0x1c06) at 0x00040000
pgd = b173c000
[00040000] *pgd=9169d835, *pte=00000000, *ppte=00000000
done.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17293-7 arm: dts: imx7ulp: update cpu set-points
Anson Huang [Tue, 26 Dec 2017 12:31:46 +0000 (20:31 +0800)]
MLK-17293-7 arm: dts: imx7ulp: update cpu set-points

According to datasheet Rev-D, on B0 part, below CPU
freq needs to be supported:

500MHz for RUN mode;
720MHz for HSRUN mode.

Update opp table accordingly.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17293-6 cpufreq: imx7ulp: support new set-points
Anson Huang [Tue, 26 Dec 2017 12:25:52 +0000 (20:25 +0800)]
MLK-17293-6 cpufreq: imx7ulp: support new set-points

According to datasheet Rev-D, on B0 part, below CPU
freq needs to be supported:

500MHz for RUN mode;
720MHz for HSRUN mode.

To achieve best accurate frequency for CPU, adjust
SPLL's frequency for SPLL_PFD0 which is CPU's
clock source:

SPLL 528MHz -> SPLL_PFD0 500.2MHz;
SPLL 480MHz -> SPLL_PFD0 720MHz;

Remove CPU RUN/HSRUN mode switch, since it is implemented
as clock mux, whenever clock parent is switched, the
RUN/HSRUN mode will be changed accordingly.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17293-5 clk: imx7ulp: adjust clk tree for B0 chip
Anson Huang [Tue, 26 Dec 2017 12:18:41 +0000 (20:18 +0800)]
MLK-17293-5 clk: imx7ulp: adjust clk tree for B0 chip

On i.MX7ULP B0 chip, snvs is located in M4 domain, remove
snvs clock from linux clock tree;

Use SMC PMCTRL RUNM field for ARM clock mux instead
of reserved register in SCG, as when CPU frequency changes,
RUNM field will switch between RUN and HSRUN, ARM clock
source will be changed accordingly, so RUNM can be used as
a clock mux.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17293-4 arm: dts: imx7ulp: remove snvs node
Anson Huang [Tue, 26 Dec 2017 12:17:42 +0000 (20:17 +0800)]
MLK-17293-4 arm: dts: imx7ulp: remove snvs node

On i.MX7ULP B0 chip, SNVS is located in M4 domain,
remove it from dtsi.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17293-3 arm: imx_v7_defconfig: enable rpmsg rtc by default
Anson Huang [Tue, 26 Dec 2017 11:00:56 +0000 (19:00 +0800)]
MLK-17293-3 arm: imx_v7_defconfig: enable rpmsg rtc by default

Enable rpmsg rtc by default.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17293-2 arm: dts: imx7ulp: add rpmsg rtc node
Anson Huang [Tue, 26 Dec 2017 10:59:55 +0000 (18:59 +0800)]
MLK-17293-2 arm: dts: imx7ulp: add rpmsg rtc node

Add rpmsg rtc node for i.MX7ULP.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17293-1 rtc: add rpmsg rtc support for i.MX7ULP
Anson Huang [Tue, 26 Dec 2017 10:53:20 +0000 (18:53 +0800)]
MLK-17293-1 rtc: add rpmsg rtc support for i.MX7ULP

On i.MX7ULP B0 chip, SNVS is located on M4 domain,
all RTC related functions need to use RPMSG channel
to communicate with M4 to proceed hardware operation.

The RTC RPMSG channel index is 6.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMGS-2914-2 [#imx-587] [8QM/qxp] Disable depth compression
Yuchou Gan [Tue, 26 Dec 2017 15:54:37 +0000 (23:54 +0800)]
MGS-2914-2 [#imx-587] [8QM/qxp] Disable depth compression

Disable the depth compression will make gles cts fail. We will fix
this failure later. Temporarily Enable it so that wouldn't block the release.

Date: Dec 26, 2017
Signed-off-by Yuchou Gan yuchou.gan@nxp.com

7 years agoMLK-17290-06 arm64: dts: gpio: add mipi csi SS gpio clock and power domain
Fugang Duan [Wed, 20 Dec 2017 09:54:33 +0000 (17:54 +0800)]
MLK-17290-06 arm64: dts: gpio: add mipi csi SS gpio clock and power domain

GPIO in MIPI CSI SS also has its related ipg clock and power
domain, add them.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Tested-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
7 years agoMLK-17290-05 gpio: mxc: save and restore gpio controller registers when power off
Fugang Duan [Mon, 25 Dec 2017 09:44:28 +0000 (17:44 +0800)]
MLK-17290-05 gpio: mxc: save and restore gpio controller registers when power off

Save gpio controller registers before power off, and then restore these
registers after power on. There have two cases need to save/restore regs:
  a. If sub_irqs/sub_gpios are not free/released, device suspend() force
     runtime suspend and power domain off in suspended stage, it needs to
     keep the previous registers value after device resume back.
  b. If some sub_irqs set irq type just one time, then irqchip should restore
     the registers for correct irq type.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Tested-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
7 years agoMLK-17290-04 gpio: mxc: add runtime pm support
Fugang Duan [Tue, 19 Dec 2017 07:47:08 +0000 (15:47 +0800)]
MLK-17290-04 gpio: mxc: add runtime pm support

Add runtime pm support to automatically enable the ipg clock and power
domain if present.

To save power, suggest all sub-devices of the gpiochip/irq domain should
dynamically manage gpio/irq resouces like:
gpio:
gpiod_request()
... //set gpio direction
gpiod_free()
irq:
devm_request_irq() //=> module active
devm_free_irq() //=>module is non-active or runtime idle

Since the driver support irqchip and gpiochip, any irq/gpio resouce requested
by other modules the gpio controller clock and power domain should be enabled.
And the irqchip's parent's clock and power also should be enabled if irq resouce
requested.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Tested-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
7 years agoMLK-17290-03 drm/bridge: request/free irq in dynamical
Fugang Duan [Tue, 19 Dec 2017 05:36:00 +0000 (13:36 +0800)]
MLK-17290-03 drm/bridge: request/free irq in dynamical

Request/free irq in dynamical can runtime manage the irq domain's
clock and power if irq domain support runtime pm and manage its
clock in its pm callback.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Tested-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
Acked-by: Robert Chiras <robert.chiras@nxp.com>
7 years agoMLK-17290-02 i2c: imx-lpi2c: manage irq resource request/release in runtime pm
Fugang Duan [Thu, 21 Dec 2017 01:14:33 +0000 (09:14 +0800)]
MLK-17290-02 i2c: imx-lpi2c: manage irq resource request/release in runtime pm

Manage irq resource request/release in runtime pm to save irq domain's
power.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Tested-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
7 years agoMLK-17290-01 irqchip: imx-irqsteer: add runtime pm support
Fugang Duan [Thu, 21 Dec 2017 01:03:57 +0000 (09:03 +0800)]
MLK-17290-01 irqchip: imx-irqsteer: add runtime pm support

Add runtime pm to manage irqsteer clock and its power domain in system
idle and suspend status to save power.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Tested-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
7 years agoMGS-3531 [#imx-865] fix gpu kernel panic issue
Xianzhong [Fri, 22 Dec 2017 20:56:32 +0000 (04:56 +0800)]
MGS-3531 [#imx-865] fix gpu kernel panic issue

it is reproduced easily with multiple es11 cts tests,
gpu kernel panic in function _ConvertLogical2Physical.

need remove mdl from global list before destroy map list,
this can prevent the wrong access on the freed map data.

Date: Dec 22, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
7 years agoMA-10617 [#imx-836] Fix CtsMediaTestCases module test uncompleted issue
Richard Liu [Wed, 20 Dec 2017 20:26:48 +0000 (04:26 +0800)]
MA-10617 [#imx-836] Fix CtsMediaTestCases module test uncompleted issue

CtsMediaTestCases module CTS test can't uncompleted due to native crash,
the crash is due to memory leak in drm gralloc, when total leak reach to
4GB it will report mmap fail and cause CTS thread crash.

Crash log:
12-02 08:14:51.982 1156 25401 E gralloc-viv: gralloc_vivante_lock#573: failed to mmap
12-02 08:14:51.982 1156 25401 E gralloc-viv: gralloc_lock#136: err=-25
12-02 08:14:51.982 1156 25401 E gralloc : gralloc_lock lock memory failed
12-02 08:14:51.982 1156 25401 W GraphicBufferMapper: lock(0xed4c2740, ...) failed: 5
12-02 08:14:51.982 1156 25401 F SoftwareRenderer: frameworks/av/media/libstagefright/
colorconversion/SoftwareRenderer.cpp:230 CHECK_EQ( 0,mapper.lock( buf->handle,
GRALLOC_USAGE_SW_WRITE_OFTEN, bounds, &dst)) failed: 0 vs. 5

Dec. 20, 2017
Signed-off-by: Richard Liu <xuegang.liu@nxp.com>
7 years agoMLK-17204-3 gpu: imx: dpu: Free command buffer when deinit
Meng Mingming [Mon, 25 Dec 2017 09:20:34 +0000 (17:20 +0800)]
MLK-17204-3 gpu: imx: dpu: Free command buffer when deinit

Free command buffer when deinit.

Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
7 years agoMLK-17257-2: drm: imx: dcss: use the WRSCL/RDSRC modules
Laurentiu Palcu [Tue, 19 Dec 2017 11:38:44 +0000 (13:38 +0200)]
MLK-17257-2: drm: imx: dcss: use the WRSCL/RDSRC modules

This patch makes the necessary changes so that, for downscaling ratios
more than 3:1 and up to 7:1 (for video) and 5:1 (for graphics), the
WRSCL/RDSRC path will be used. This way the DRAM bandwidth will be lower
and spread evenly across the frame time.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17257-1: drm: imx: dcss: Add WRSCL/RDSRC modules
Laurentiu Palcu [Tue, 19 Dec 2017 11:33:32 +0000 (13:33 +0200)]
MLK-17257-1: drm: imx: dcss: Add WRSCL/RDSRC modules

WRSCL and RDSRC modules will be needed when downscaling ratios starting
from 3:1 up to 7:1 are needed. Otherwise, if the usual scaling path is
used, the DRAM bandwidth needed will be too much and performance will be
affected.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17274: drm: imx: dcss: use_global_alpha not working if channel
Laurentiu Palcu [Wed, 20 Dec 2017 13:13:33 +0000 (15:13 +0200)]
MLK-17274: drm: imx: dcss: use_global_alpha not working if channel
already enabled

If the channel is already enabled, or it doesn't need a mode set, then
the dcss_dtg_global_alpha_changed() will always return false for formats
with per-pixel alpha. Hence, the plane will not be updated. This patch
removes the check for image format and the check will be done for all
image formats.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17243 drm/imx: dpu: plane: Add format modifiers
Liu Ying [Tue, 19 Dec 2017 06:58:14 +0000 (14:58 +0800)]
MLK-17243 drm/imx: dpu: plane: Add format modifiers

This patch adds format modifiers for DPU DRM planes.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
7 years agodrm: Shift wrap bug in create_in_format_blob()
Dan Carpenter [Wed, 9 Aug 2017 11:19:06 +0000 (14:19 +0300)]
drm: Shift wrap bug in create_in_format_blob()

"plane->format_count" can go up to 64.  (It's capped in
drm_universal_plane_init().)  So we should be using ULL type instead of
int here to prevent shift wrapping.

Fixes: db1689aa61bd ("drm: Create a format/modifier blob")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20170809111906.4rv3hzritctfktv3@mwanda
(cherry picked from commit aadd41485bb227a16f964833a4fd55c091f4a729)

7 years agodrm: Create a format/modifier blob
Ben Widawsky [Mon, 24 Jul 2017 03:46:39 +0000 (20:46 -0700)]
drm: Create a format/modifier blob

Updated blob layout (Rob, Daniel, Kristian, xerpi)

v2:
* Removed __packed, and alignment (.+)
* Fix indent in drm_format_modifier fields (Liviu)
* Remove duplicated modifier > 64 check (Liviu)
* Change comment about modifier (Liviu)
* Remove arguments to blob creation, use plane instead (Liviu)
* Fix data types (Ben)
* Make the blob part of uapi (Daniel)

v3:
Remove unused ret field.
Change i, and j to unsigned int (Emil)

v4:
Use plane->modifier_count instead of recounting (Daniel)

v5:
Rename modifiers to modifiers_property (Ville)
Use sizeof(__u32) instead to reflect UAPI nature (Ville)
Make BUILD_BUG_ON for blob header size

Cc: Rob Clark <robdclark@gmail.com>
Cc: Kristian H. Kristensen <hoegsberg@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Daniel Stone <daniels@collabora.com> (v2)
Reviewed-by: Liviu Dudau <liviu@dudau.co.uk> (v2)
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> (v3)
Signed-off-by: Daniel Stone <daniels@collabora.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170724034641.13369-2-ben@bwidawsk.net
(cherry picked from commit db1689aa61bd1efb5ce9b896e7aa860a85b7f1b6)

Conflicts:
drivers/gpu/drm/drm_crtc.c
drivers/gpu/drm/drm_mode_config.c
include/drm/drm_crtc.h
include/drm/drm_mode_config.h

7 years agodrm: Plumb modifiers through plane init
Ben Widawsky [Mon, 24 Jul 2017 03:46:38 +0000 (20:46 -0700)]
drm: Plumb modifiers through plane init

This is the plumbing for supporting fb modifiers on planes. Modifiers
have already been introduced to some extent, but this series will extend
this to allow querying modifiers per plane. Based on this, the client to
enable optimal modifications for framebuffers.

This patch simply allows the DRM drivers to initialize their list of
supported modifiers upon initializing the plane.

v2: A minor addition from Daniel

v3:
* Updated commit message
* s/INVALID/DRM_FORMAT_MOD_INVALID (Liviu)
* Remove some excess newlines (Liviu)
* Update comment for > 64 modifiers (Liviu)

v4: Minor comment adjustments (Liviu)

v5: Some new platforms added due to rebase

v6: Add some missed plane inits (or maybe they're new - who knows at
this point) (Daniel)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Daniel Stone <daniels@collabora.com> (v2)
Reviewed-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit e6fc3b68558e4c6d8d160b5daf2511b99afa8814)

Conflicts:
       drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
       drivers/gpu/drm/imx/dcss/dcss-plane.c
       drivers/gpu/drm/imx/dpu/dpu-plane.c
       drivers/gpu/drm/imx/ipuv3-plane.c
       drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c
       drivers/gpu/drm/meson/meson_plane.c
       drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
       drivers/gpu/drm/mxsfb/mxsfb_drv.c
       drivers/gpu/drm/nouveau/nv50_display.c
       drivers/gpu/drm/omapdrm/omap_plane.c
       drivers/gpu/drm/pl111/pl111_display.c
       drivers/gpu/drm/qxl/qxl_display.c
       drivers/gpu/drm/stm/ltdc.c
       drivers/gpu/drm/sun4i/sun8i_layer.c
       drivers/gpu/drm/tinydrm/core/tinydrm-pipe.c
       drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
       drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
       drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
       drivers/gpu/drm/zte/zx_plane.c
       include/drm/drm_plane.h

7 years agoMLK-17261-2 usb: chipidea: imx: do not call hsic callback for non-hsic controller
Peter Chen [Thu, 21 Dec 2017 01:06:40 +0000 (09:06 +0800)]
MLK-17261-2 usb: chipidea: imx: do not call hsic callback for non-hsic controller

With this judgement, the non-hsic controller will access wrong registers,
and below error message will be showed:
"usbmisc_imx 2184800.usbmisc: index is error for usbmisc"

Fixes: 113be1516160 ("MLK-16715-6 usb: chipidea: imx:
add HSIC support for controllers from imx7d")
Reported-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-17261-1 usb: cdns3: gadget: fix the spinlock recursion problem when detach cable
Peter Chen [Thu, 21 Dec 2017 01:05:45 +0000 (09:05 +0800)]
MLK-17261-1 usb: cdns3: gadget: fix the spinlock recursion problem when detach cable

The __cdns3_gadget_stop holds spinlock before calling
usb_ss->gadget_driver->disconnect which calls ep_disable,
and ep_disable tries to hold spinlock too.

To fix it, let spinlock only protect the variable and register access.

Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-17232-3: dts: arm64: imx8mq: remove APB clock for rm67191 DTS
Laurentiu Palcu [Mon, 18 Dec 2017 06:36:10 +0000 (08:36 +0200)]
MLK-17232-3: dts: arm64: imx8mq: remove APB clock for rm67191 DTS

According to commit:

<8c9aa9e83e37> "MLK-16942-2: dts: Remove disp_apb clock rate setting"

APB clock is configured by ROM code and it should be 133MHz. Remove the
setting from this DTS.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17232-2: drm: imx: dcss: ignore SB_PEND_DISP_ACTIVE interrupt
Laurentiu Palcu [Mon, 18 Dec 2017 06:22:25 +0000 (08:22 +0200)]
MLK-17232-2: drm: imx: dcss: ignore SB_PEND_DISP_ACTIVE interrupt

There is a logic error in the DCSS B0 silicon and this interrupt does
not behave as it's supposed to. Ignore for now.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17232-1: drm: imx: dcss: Fix context loader settings for LCD panel
Laurentiu Palcu [Thu, 14 Dec 2017 13:35:02 +0000 (15:35 +0200)]
MLK-17232-1: drm: imx: dcss: Fix context loader settings for LCD panel

If the vfront/vback porches are small are vsync length is small, the
dis_ulc_y is also small. Hence, the DB trigger setting will be
inappropriate and the DB context will not be able to load in time.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17231-3: drm: imx: dcss: drop runtime autosuspend feature
Laurentiu Palcu [Tue, 12 Dec 2017 11:08:36 +0000 (13:08 +0200)]
MLK-17231-3: drm: imx: dcss: drop runtime autosuspend feature

This was needed when using the mode_set_nofb() callback. Since
everything was moved to crtc_enable() callback, runtime autosuspend
can be dropped.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17231-2: drm: imx: dcss: Do not use mode_set_nofb callback
Laurentiu Palcu [Tue, 12 Dec 2017 11:06:35 +0000 (13:06 +0200)]
MLK-17231-2: drm: imx: dcss: Do not use mode_set_nofb callback

This callback is not suitable for drivers using runtime PM. Move
everything in the crtc_enable() callback.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17231-1: drm: imx: dcss: set own KMS commit_tail callback
Laurentiu Palcu [Tue, 12 Dec 2017 10:13:27 +0000 (12:13 +0200)]
MLK-17231-1: drm: imx: dcss: set own KMS commit_tail callback

According to documentation, for the default commit_tail helper:

 * Note that the default ordering of how the various stages are called is to
 * match the legacy modeset helper library closest. One peculiarity of that is
 * that it doesn't mesh well with runtime PM at all.
 *
 * For drivers supporting runtime PM the recommended sequence is instead ::
 *
 *     drm_atomic_helper_commit_modeset_disables(dev, state);
 *
 *     drm_atomic_helper_commit_modeset_enables(dev, state);
 *
 *     drm_atomic_helper_commit_planes(dev, state,
 *                                     DRM_PLANE_COMMIT_ACTIVE_ONLY);

This patch creates our own commit_tail() callback and changes the order of the
commit_modeset callbacks, as instructed.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17204-2 drm/imx: dpu: Set driver data as null when to unbind device
Meng Mingming [Wed, 20 Dec 2017 01:30:27 +0000 (09:30 +0800)]
MLK-17204-2 drm/imx: dpu: Set driver data as null when to unbind device

Set driver data as null when to unbind device.

Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
7 years agoMLK-17237 staging: typec: return error when tcpci_parse_config has failed
Peter Chen [Mon, 18 Dec 2017 09:21:43 +0000 (17:21 +0800)]
MLK-17237 staging: typec: return error when tcpci_parse_config has failed

Otherwise, the probe would be considered successfully, and without
do any destroy jobs, eg, the interrupt has still registered.

Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-17062 usb: cdns3: gadget: add test mode support for USB2
Peter Chen [Mon, 4 Dec 2017 05:49:03 +0000 (13:49 +0800)]
MLK-17062 usb: cdns3: gadget: add test mode support for USB2

Add USB2 device test mode support for CDNS3 IP

Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-17242-3 arm64: dts: fsl-imx8qm-mek: remove properties for power sink
Li Jun [Tue, 19 Dec 2017 13:02:45 +0000 (21:02 +0800)]
MLK-17242-3 arm64: dts: fsl-imx8qm-mek: remove properties for power sink

As imx8qm MEK typec port only can support power source on power role,
remove those properties for power sink after we add fixed power sink
settings.

Tested-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
7 years agoMLK-17242-2 arm64: dts: fsl-imx8qxp-mek: remove properties for power sink
Li Jun [Tue, 19 Dec 2017 13:00:28 +0000 (21:00 +0800)]
MLK-17242-2 arm64: dts: fsl-imx8qxp-mek: remove properties for power sink

As imx8qxp MEK typec port only can support power source on power role,
remove those properties for power sink after we add fixed power sink
settings.

Tested-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
7 years agoMLK-17242-1 staging: typec: tcpci: add sink setting for sink-disable
Li Jun [Tue, 19 Dec 2017 11:07:44 +0000 (19:07 +0800)]
MLK-17242-1 staging: typec: tcpci: add sink setting for sink-disable

Adding fixed sink power settings for sink-disable case, which
is only for PD protocol talk to know the cc orientation if connects
to a PD capable host, HW doesn't really sink any power in this case.

Tested-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
7 years agoMA-10829-2: add compat ioctl for malone vpu
Zhou Peng-B04994 [Wed, 20 Dec 2017 03:51:40 +0000 (11:51 +0800)]
MA-10829-2: add compat ioctl for malone vpu

Fix the ioctl issue of VPU_IOC_WAIT4INT

Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
7 years agodrm: fix possible_crtc's type
Tomi Valkeinen [Fri, 2 Dec 2016 13:45:35 +0000 (15:45 +0200)]
drm: fix possible_crtc's type

drm_universal_plane_init() and drm_plane_init() take "unsigned long
possible_crtcs" parameter, but then stuff it into uint32_t. Change the
parameter to uint32_t.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
(cherry picked from commit 5cd57a46e3e3dc088b50bbfcdc85d9e0d9c22159)

7 years agodrm_fourcc: Document linear modifier
Daniel Vetter [Wed, 9 Nov 2016 12:36:36 +0000 (13:36 +0100)]
drm_fourcc: Document linear modifier

Not setting the fb modifiers flag is something different from setting
the fb modifiers to 0 (which means explicitly linear). We kinda failed
to document that properly. Spotted by Kristian.

Cc: hoegsberg@google.com
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1478694996-4200-1-git-send-email-daniel.vetter@ffwll.ch
(cherry picked from commit b9fb2a21ac8058965a6b3fcae736cfa7f411d6eb)

7 years agoMA-10829: add compat ioctl for malone vpu
Zhou Peng-B04994 [Tue, 19 Dec 2017 06:54:04 +0000 (14:54 +0800)]
MA-10829: add compat ioctl for malone vpu

Define 32bit ioctl for Android platform

Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
7 years agoMLK-17206 hdp: Disable firmware hdp loading
Oliver Brown [Thu, 14 Dec 2017 00:16:08 +0000 (18:16 -0600)]
MLK-17206 hdp: Disable firmware hdp loading

Disabling HDP firmware loading except for debug.
Added simple checks to test HDP firmware status.

Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
7 years agoMLK-17111-4: crypto: caam: Fix RNG Kernel oops on i.MX8QXP
Aymen Sghaier [Mon, 18 Dec 2017 11:06:00 +0000 (12:06 +0100)]
MLK-17111-4: crypto: caam: Fix RNG Kernel oops on i.MX8QXP

  Seen on i.MX8QXP board by reboot test, that Kernel oops occurs
 due to failing RNG instantiation with default entropy delay.
  The fix is to disable all job rings if RNG failed to prevent
 Kernel crash. And print an error message saying that this is
 a known limitation on REV A0 SoC.

Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
7 years agoMGS-3255: gpu-viv: implement command commit worker
Xianzhong [Sat, 16 Dec 2017 23:31:09 +0000 (07:31 +0800)]
MGS-3255: gpu-viv: implement command commit worker

i.MX8QM dual GPU SW workaround since no command sharing HW fix in B0,
optimized driver to improve GPU benchmark with better performance.

Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
7 years agoMLK-17088: mipi_csi: improve the compatiblility of S_FMT
Guoniu.Zhou [Wed, 13 Dec 2017 07:15:40 +0000 (15:15 +0800)]
MLK-17088: mipi_csi: improve the compatiblility of S_FMT

1) When app call S_FMT ioctl, they may only set width, height
   and format of image. So driver can't determine whether it
   support the specified format by checking the format fourcc
   value and the plane number.

2) Driver should also fill plane and sizeimage member in S_FMT
   ioctl, because some apps use this information after they call
   S_FMT ioctl, such as gstreamer.

Reviewed-by: Sandor.Yu <sandor.yu@nxp.com>
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
7 years agoMLK-16879-3 can: flexcan: add notes for avaliable fd mode rate combinations
Dong Aisheng [Fri, 15 Dec 2017 10:49:38 +0000 (18:49 +0800)]
MLK-16879-3 can: flexcan: add notes for avaliable fd mode rate combinations

CAN FD can only support some specific bitrate combinations in FD mode
due to HW limitations. See below info mentioned in RM:
"To minimize errors when processing FD frames, use the same value
for FPRESDIV and PRESDIV (in CAN_CBT or CAN_CTRL1)."

Add notes in driver to let user know easily:

CAN FD supported rates combinations
* Combination 1:
*  Bitrate: 225000 375000 400000 425000 500000 875000
*  Data rate: 1000000
*
* Combination 2:
*  Bitrate:   550000 600000 625000 650000 675000 750000 775000
*             800000 850000 925000 950000 975000 1000000
*  Data rate: 1500000 2000000 2500000 3000000 3500000 4000000
*             5000000

Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
7 years agoMLK-16879-2 can: flexcan: allow user to disable can fd mode from device tree
Dong Aisheng [Fri, 15 Dec 2017 10:38:15 +0000 (18:38 +0800)]
MLK-16879-2 can: flexcan: allow user to disable can fd mode from device tree

Normally CAN FD capable device must work on FD mode as it has different
statically claimed bittiming capability.
This patch provides users to disable CAN FD capability if users want
to only work at normal mode.

Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
7 years agoMLK-16879-1 can: flexcan: improve can fd bittiming setting
Dong Aisheng [Thu, 14 Dec 2017 14:18:53 +0000 (22:18 +0800)]
MLK-16879-1 can: flexcan: improve can fd bittiming setting

The CAN bit timing variables (PRESDIV, PROPSEG, PSEG1, PSEG2 and RJW)
can also be configured in CAN_CBT register, which extends the range of
all these variables. It can improve the bittiming accuracy.

Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
7 years agoMLK-17159 dts: imx8qm-mek: fix can regulator name
Dong Aisheng [Tue, 12 Dec 2017 10:05:51 +0000 (18:05 +0800)]
MLK-17159 dts: imx8qm-mek: fix can regulator name

Fix can regulator names which may cause the debugfs creation fail
due to the duplicated regulator-name of can0/1.
No functions affect.

root@imx8qmmek:~# dmesg | grep Fail
[    3.276839] can01-en: Failed to create debugfs directory
[    3.292414] can01-stby: Failed to create debugfs directory

Fixes: 90cd72423ed5 ("MLK-16606-4 arm64: dts: imx8qm-mek: add flexcan support")
Reported-by: Jason Liu <jason.hui.liu@nxp.com>
Reviewed-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
7 years agoMLK-17224 arm64: dts: jdi-wuxga-lvds1-panel.dts: disable ldb1
Jason Liu [Fri, 15 Dec 2017 00:40:59 +0000 (08:40 +0800)]
MLK-17224 arm64: dts: jdi-wuxga-lvds1-panel.dts: disable ldb1

current dts supports dual channel LVDS panel connected with ldb2, while it
also needs the cable connected with ldb1 for example need  LVDS-HDMI covert
connect with LVDS0_CH0 on the board, otherwise, the LVDS panel not work.

This is not user friendly. This patch removes the limitation by disable the
ldb1 interface by default.

Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
Acked-by: Liu Ying <victor.liu@nxp.com>
7 years agoMLK-17225 gpu: imx: imx8_dprc: Directly map color component for 32bit RGB pixels
Liu Ying [Fri, 15 Dec 2017 08:51:39 +0000 (16:51 +0800)]
MLK-17225 gpu: imx: imx8_dprc: Directly map color component for 32bit RGB pixels

The DPR prefetch engine has the A/R/G/B_COMP_SEL fields in the
MODE_CTRL0 register to control the color component position
mapping from input to output.  We may choose to use direct mapping
and leave the pixel format to be handled by the display controllers.

Fixes: a0a3a82f90e9 ("MLK-15110-3 gpu: imx: Add i.MX8 DPR(Display Prefetch Resolve) support")
Reported-by: Richard Liu <xuegang.liu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
7 years agoMLK-17223-2: dts: Add eight cameras dts for imx8qm arm2 board
Sandor Yu [Fri, 15 Dec 2017 10:14:26 +0000 (18:14 +0800)]
MLK-17223-2: dts: Add eight cameras dts for imx8qm arm2 board

Enable mipi csi 1 in the dts.
MAX support eight cameras for imx8qm arm2 board with the dtb.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17223-1: dts: Add eight cameras dts for imx8qm mek board
Sandor Yu [Fri, 15 Dec 2017 09:56:36 +0000 (17:56 +0800)]
MLK-17223-1: dts: Add eight cameras dts for imx8qm mek board

Enable mipi csi 1 in the dts.
MAX support eight cameras for imx8qm mek board with the dtb.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17215-3 video: fbdev: mipi_dsi_northwest: refine 'phy-ref-clkfreq' get to support...
Fancy Fang [Thu, 14 Dec 2017 07:21:31 +0000 (15:21 +0800)]
MLK-17215-3 video: fbdev: mipi_dsi_northwest: refine 'phy-ref-clkfreq' get to support all socs

Move the code slice of getting 'phy-ref-clkfreq' property
to probe function to support arm32 socs besides arm64.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-17215-2 ARM: dts: imx7ulp: add 'phy-ref-clkfreq' property for mipi dsi
Fancy Fang [Thu, 14 Dec 2017 06:53:54 +0000 (14:53 +0800)]
MLK-17215-2 ARM: dts: imx7ulp: add 'phy-ref-clkfreq' property for mipi dsi

Add 'phy-ref-clkfreq' property for 'mipi_dsi' node on
imx7ulp board.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-17215-1 video: fbdev: mipi_dsi_northwest: fix an integer overflow issue
Fancy Fang [Thu, 14 Dec 2017 07:25:26 +0000 (15:25 +0800)]
MLK-17215-1 video: fbdev: mipi_dsi_northwest: fix an integer overflow issue

On ARM32 socs, the 'UL' and 'ULL' postfix are different.
And if using a 64bit constant integer, 'ULL' is the right
postfix.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMGS-3506 [#imx-805] Support compression for GPU no resolve
Yong Gan [Wed, 13 Dec 2017 22:13:59 +0000 (06:13 +0800)]
MGS-3506 [#imx-805] Support compression for GPU no resolve

Support compression for GPU no resolve between client and compositor.
Enable gcdENABLE_RENDER_INTO_WINDOW_WITH_FC,
Implement enable_tile_status in viv protocol.

Signed-off-by: Yong Gan yong.gan@nxp.com
Reviewed-by: Xianzhong Li xianzhong.li@nxp.com
Reviewed-by: Y.c. Gan yuchou.gan@nxp.com
Reviewed-by: Prabhu Sundararaj prabhu.sundararaj@nxp.com
7 years agoMA-10665-3 [#imx-615] Fix monkey test reboot issue due to drm gem bug
Richard Liu [Mon, 27 Nov 2017 10:30:47 +0000 (18:30 +0800)]
MA-10665-3 [#imx-615] Fix monkey test reboot issue due to drm gem bug

Fix monkey test reboot issue due to drm gem bug.
1. deref gem_obj in the end of funtion
2. replace async unlock with bottom half unlock.

Monkey commands:
while true;do monkey --pct-syskeys 0 -v 100000;done

Reboot log:
[ 884.062236] WARNING: CPU: 3 PID: 3987 at drivers/gpu/drm/drm_gem.c:776 drm_gem_object_release+0x40/0x48
[ 884.076072] Modules linked in: bcmdhd
[ 884.079760]
[ 884.081260] CPU: 3 PID: 3987 Comm: ReferenceQueueD Not tainted 4.9.56-00115-ge9a7131 #1
[ 884.089268] Hardware name: Freescale i.MX8QXP MEK (DT)
[ 884.094410] task: ffff80004cf6de80 task.stack: ffff800839838000
[ 884.100338] PC is at drm_gem_object_release+0x40/0x48
[ 884.105405] LR is at viv_gem_free_object+0x64/0x90

Date: Nov 27, 2017
Signed-off-by: Richard Liu <xuegang.liu@nxp.com>