From: Josep Orga <jorga@somdevices.com>
Date: Tue, 10 Jan 2023 17:33:11 +0000 (+0100)
Subject: arm64: dts: Disable BT from UART1.
X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.1~10
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=faeef8287cbafae5936370300db26443ea848b84;p=linux.git

arm64: dts: Disable BT from UART1.

Signed-off-by: Josep Orga <jorga@somdevices.com>
---

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-somdevices.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-somdevices.dtsi
index 151f16363530..6484a9ac8a9a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-somdevices.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-somdevices.dtsi
@@ -39,6 +39,7 @@
 		reset-delay-us = <2000>;
 		reset-post-delay-ms = <40>;
 		#reset-cells = <0>;
+		status = "disabled";
 	};
 
 	pcie0_refclk: pcie0-refclk {
@@ -536,7 +537,7 @@
 	fsl,sai-multi-lane;
 	fsl,dataline,dsd = <0 0xff 0xff 2 0xff 0x11>;
 	dmas = <&sdma2 0 25 0>, <&sdma2 1 25 0>;
-	status = "okay";
+	status = "disabled";
 };
 
 &sai5 {
@@ -558,13 +559,12 @@
 	status = "okay";
 };
 
-&uart1 { /* BT */
+&uart1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart1>;
 	assigned-clocks = <&clk IMX8MM_CLK_UART1>;
 	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
 	fsl,uart-has-rtscts;
-	resets = <&modem_reset>;
 	status = "okay";
 };