From: Abel Vesa <abel.vesa@nxp.com>
Date: Thu, 8 Oct 2020 10:51:31 +0000 (+0300)
Subject: LF-2438 arm64: kernel: smp: Add workaround for i.MX8MQ ERR11171
X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.0~563^2~11^2~1
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=e0381032938af6cb3f54369379168dc8188f23f9;p=linux.git

LF-2438 arm64: kernel: smp: Add workaround for i.MX8MQ ERR11171

Since commit 5cebfd2d47c214 "arm64: Kill __smp_cross_call and co",
the workaround for ERR11171 for i.MX8MQ needs a different approach.
In order to do go to EL3 to power up/down the cores, right after
the ipi was raised, we call imx_gpcv2_raise_softirq which is
only built if the CONFIG_IMX_GPCV2 is enabled. Then, in
imx_gpcv2_raise_softirq depending on the existance of the ERR11171
on any platform, we call into EL3 or skip everything and get out.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 18e9727d3f64..21f0eb2f6322 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -949,10 +949,19 @@ static irqreturn_t ipi_handler(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
+#ifdef CONFIG_IMX_GPCV2
+extern void imx_gpcv2_raise_softirq(const struct cpumask *mask,
+		                                         unsigned int irq);
+#endif
+
 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
 {
 	trace_ipi_raise(target, ipi_types[ipinr]);
 	__ipi_send_mask(ipi_desc[ipinr], target);
+
+#ifdef CONFIG_IMX_GPCV2
+	imx_gpcv2_raise_softirq(target, ipinr);
+#endif
 }
 
 static void ipi_setup(int cpu)