From: Josep Orga Date: Fri, 29 Oct 2021 06:55:55 +0000 (+0200) Subject: imx8mn-somdevices: arm: dts: Add imx8mn-somdevices-u-boot.dtsi copying imx8mn-evk... X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.0~7 X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=bf54392a08960988d7c16cec007c47e80ac25ff1;p=u-boot.git imx8mn-somdevices: arm: dts: Add imx8mn-somdevices-u-boot.dtsi copying imx8mn-evk-u-boot.dtsi file. Signed-off-by: Josep Orga --- diff --git a/arch/arm/dts/imx8mn-somdevices-u-boot.dtsi b/arch/arm/dts/imx8mn-somdevices-u-boot.dtsi new file mode 100644 index 0000000000..20e2ffccce --- /dev/null +++ b/arch/arm/dts/imx8mn-somdevices-u-boot.dtsi @@ -0,0 +1,215 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +/ { + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + u-boot,dm-spl; + }; + + aliases { + usbgadget0 = &usbg1; + usbgadget1 = &usbg2; + }; + + usbg1: usbg1 { + compatible = "fsl,imx27-usb-gadget"; + dr_mode = "peripheral"; + chipidea,usb = <&usbotg1>; + status = "okay"; + }; + + usbg2: usbg2 { + compatible = "fsl,imx27-usb-gadget"; + dr_mode = "peripheral"; + chipidea,usb = <&usbotg2>; + status = "okay"; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; +}; + +&{/soc@0} { + u-boot,dm-pre-reloc; + u-boot,dm-spl; +}; + +&clk { + u-boot,dm-spl; + u-boot,dm-pre-reloc; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; +}; + +&osc_24m { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&aips1 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&aips2 { + u-boot,dm-spl; +}; + +&aips3 { + u-boot,dm-spl; +}; + +&iomuxc { + u-boot,dm-spl; +}; + +®_usdhc2_vmmc { + u-boot,dm-spl; + u-boot,off-on-delay-us = <20000>; +}; + +&pinctrl_reg_usdhc2_vmmc { + u-boot,dm-spl; +}; + +&pinctrl_uart2 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2_gpio { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3 { + u-boot,dm-spl; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&gpio3 { + u-boot,dm-spl; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; +}; + +&uart2 { + u-boot,dm-spl; +}; + +&crypto { + u-boot,dm-spl; +}; + +&sec_jr0 { + u-boot,dm-spl; +}; + +&sec_jr1 { + u-boot,dm-spl; +}; + +&sec_jr2 { + u-boot,dm-spl; +}; + +&usdhc1 { + u-boot,dm-spl; + assigned-clocks = <&clk IMX8MN_CLK_USDHC1>; + assigned-clock-rates = <400000000>; + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_400M>; +}; + +&usdhc2 { + u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; + assigned-clocks = <&clk IMX8MN_CLK_USDHC2>; + assigned-clock-rates = <400000000>; + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_400M>; +}; + +&usdhc3 { + u-boot,dm-spl; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + assigned-clocks = <&clk IMX8MN_CLK_USDHC3>; + assigned-clock-rates = <400000000>; + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_400M>; +}; + +&wdog1 { + u-boot,dm-spl; +}; + +&i2c1 { + u-boot,dm-spl; +}; + +&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} { + u-boot,dm-spl; +}; + +&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} { + u-boot,dm-spl; +}; + +&pinctrl_i2c1 { + u-boot,dm-spl; +}; + +&pinctrl_i2c1_gpio { + u-boot,dm-spl; +}; + +&pinctrl_pmic { + u-boot,dm-spl; +}; + +&fec1 { + phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; +}; + +ðphy0 { + vddio0: vddio-regulator { + regulator-name = "VDDIO"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; +}; + +&lcdif { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; +}; + +&mipi_dsi { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; +};