From: Clark Wang Date: Thu, 9 Jan 2020 07:15:01 +0000 (+0800) Subject: LF-749 ARM: dts: imx6qdl: add bus recovery for i2c buses X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.0~577^2~2^2~479 X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=61b0fdfbfc6e5f195980332f0d3687cc6ebff2a9;p=linux.git LF-749 ARM: dts: imx6qdl: add bus recovery for i2c buses Add bus recovery for all i2c buses to avoid bus dead lock. Signed-off-by: Clark Wang Acked-by: Fugang Duan --- diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 2a31718e5e43..0ef11a6116fa 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -391,8 +391,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8962@1a { @@ -474,8 +477,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; status = "okay"; touchscreen@4 { @@ -645,8 +651,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; status = "okay"; egalax_ts@4 { @@ -779,6 +788,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1_gpio_grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b0b0 + MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b8b0 + >; + }; + pinctrl_i2c1_mma8451_int: i2c1mma8451intgrp { fsl,pins = < MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0xb0b1 @@ -792,6 +808,13 @@ >; }; + pinctrl_i2c2_gpio: i2c2_gpio_grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b8b0 + MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0 + >; + }; + pinctrl_i2c2_egalax_int: i2c2egalaxintgrp { fsl,pins = < MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0 @@ -805,6 +828,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3_gpio_grp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b8b0 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 + >; + }; + pinctrl_i2c3_isl29023_int: i2c3isl29023intgrp { fsl,pins = < MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0xb0b1