From: Ye Li <ye.li@nxp.com>
Date: Tue, 13 Dec 2016 07:33:41 +0000 (+0800)
Subject: MLK-13602-3 mx6ullevk/arm2: Enable module fuse checking for mx6ull boards
X-Git-Tag: rel_imx_4.9.88_2.0.0_ga~721
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=5fa7d431db1c5eda903f211a99c426d8d57293bd;p=u-boot.git

MLK-13602-3 mx6ullevk/arm2: Enable module fuse checking for mx6ull boards

Enable the module disable fuse checking configurations, and ENET fuse checking during
ENET setup.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit d2192a3909be8ab9433082e7c04c917489b28e25)
---

diff --git a/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c b/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c
index 58c354d094..8cfe2e3952 100644
--- a/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c
+++ b/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c
@@ -784,6 +784,8 @@ static int setup_fec(int fec_id)
 	int ret;
 
 	if (0 == fec_id) {
+		if (check_module_fused(MX6_MODULE_ENET1))
+			return -1;
 		/*
 		 * Use 50M anatop loopback REF_CLK1 for ENET1,
 		 * clear gpr1[13], set gpr1[17]
@@ -795,6 +797,9 @@ static int setup_fec(int fec_id)
 			return ret;
 
 	} else {
+		if (check_module_fused(MX6_MODULE_ENET2))
+			return -1;
+
 		/* clk from phy, set gpr1[14], clear gpr1[18]*/
 		clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
 				IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK);
diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c
index fce1f39613..aef4ce96de 100644
--- a/board/freescale/mx6ullevk/mx6ullevk.c
+++ b/board/freescale/mx6ullevk/mx6ullevk.c
@@ -312,6 +312,9 @@ static int setup_fec(int fec_id)
 	int ret;
 
 	if (fec_id == 0) {
+		if (check_module_fused(MX6_MODULE_ENET1))
+			return -1;
+
 		/*
 		 * Use 50M anatop loopback REF_CLK1 for ENET1,
 		 * clear gpr1[13], set gpr1[17].
@@ -319,6 +322,9 @@ static int setup_fec(int fec_id)
 		clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
 				IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
 	} else {
+		if (check_module_fused(MX6_MODULE_ENET2))
+			return -1;
+
 		/*
 		 * Use 50M anatop loopback REF_CLK2 for ENET2,
 		 * clear gpr1[14], set gpr1[18].
diff --git a/include/configs/mx6ull_ddr3_arm2.h b/include/configs/mx6ull_ddr3_arm2.h
index e4d8d93b05..b4d47a8594 100644
--- a/include/configs/mx6ull_ddr3_arm2.h
+++ b/include/configs/mx6ull_ddr3_arm2.h
@@ -126,4 +126,7 @@
 #define CONFIG_WAVEFORM_BUF_SIZE		0x400000
 #endif
 
+#define CONFIG_MODULE_FUSE
+#define CONFIG_OF_SYSTEM_SETUP
+
 #endif
diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h
index 7d4c8f997c..dd8106cd46 100644
--- a/include/configs/mx6ullevk.h
+++ b/include/configs/mx6ullevk.h
@@ -323,4 +323,7 @@
 #define CONFIG_IMX_VIDEO_SKIP
 #endif
 
+#define CONFIG_MODULE_FUSE
+#define CONFIG_OF_SYSTEM_SETUP
+
 #endif