From: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Date: Mon, 17 Jun 2019 20:18:16 +0000 (+0900)
Subject: arm64: dts: renesas: r8a77995: Fix register range of display node
X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.0~3890^2~34^2~20
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=56d651e890f3befd616b6962a862f5ffa1a514fa;p=linux.git

arm64: dts: renesas: r8a77995: Fix register range of display node

Since the R8A77995 SoC uses DU{0,1}, the range from the base address to
the 0x4000 address is used.
This patch fixed it.

Fixes: 18f1a773e3f9e6d1 ("arm64: dts: renesas: r8a77995: add DU support")
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index ca6aeabd6d04..bcd54421796d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -995,7 +995,7 @@
 
 		du: display@feb00000 {
 			compatible = "renesas,du-r8a77995";
-			reg = <0 0xfeb00000 0 0x80000>;
+			reg = <0 0xfeb00000 0 0x40000>;
 			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 724>,