From: Frank Li Date: Fri, 28 Jul 2017 20:10:28 +0000 (-0500) Subject: MLK-16101 MU: avoid read mu version register every scu call X-Git-Tag: C0P2-H0.0--20200415~1965 X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=5078734d422dec89f2131983c5d487d6f2dabbff;p=linux.git MLK-16101 MU: avoid read mu version register every scu call Generally read mu registers will take about 225ns. Overall scu_clk_enable function takes about 8000ns to 150000ns. Although read version register just take 3% time, it is not necessary to read version register every time. Signed-off-by: Frank Li --- diff --git a/drivers/soc/imx/mu/mx8_mu.c b/drivers/soc/imx/mu/mx8_mu.c index 7409c2cc6e37..894c8fc6bdcd 100644 --- a/drivers/soc/imx/mu/mx8_mu.c +++ b/drivers/soc/imx/mu/mx8_mu.c @@ -9,6 +9,7 @@ #include #include +static int version; /*! * This function sets the Flag n of the MU. @@ -21,7 +22,7 @@ int32_t MU_SetFn(void __iomem *base, uint32_t Fn) if (reg > 0) return -EINVAL; - offset = unlikely((readl_relaxed(base) >> 16) == MU_VER_ID_V10) + offset = unlikely(version == MU_VER_ID_V10) ? MU_V10_ACR_OFFSET1 : MU_ACR_OFFSET1; reg = readl_relaxed(base + offset); @@ -40,7 +41,7 @@ uint32_t MU_ReadStatus(void __iomem *base) { uint32_t reg, offset; - offset = unlikely((readl_relaxed(base) >> 16) == MU_VER_ID_V10) + offset = unlikely(version == MU_VER_ID_V10) ? MU_V10_ASR_OFFSET1 : MU_ASR_OFFSET1; reg = readl_relaxed(base + offset); @@ -55,7 +56,7 @@ void MU_EnableRxFullInt(void __iomem *base, uint32_t index) { uint32_t reg, offset; - offset = unlikely((readl_relaxed(base) >> 16) == MU_VER_ID_V10) + offset = unlikely(version == MU_VER_ID_V10) ? MU_V10_ACR_OFFSET1 : MU_ACR_OFFSET1; reg = readl_relaxed(base + offset); @@ -71,7 +72,7 @@ void MU_EnableGeneralInt(void __iomem *base, uint32_t index) { uint32_t reg, offset; - offset = unlikely((readl_relaxed(base) >> 16) == MU_VER_ID_V10) + offset = unlikely(version == MU_VER_ID_V10) ? MU_V10_ACR_OFFSET1 : MU_ACR_OFFSET1; reg = readl_relaxed(base + offset); @@ -87,7 +88,7 @@ void MU_SendMessage(void __iomem *base, uint32_t regIndex, uint32_t msg) { uint32_t mask = MU_SR_TE0_MASK1 >> regIndex; - if (unlikely((readl_relaxed(base) >> 16) == MU_VER_ID_V10)) { + if (unlikely(version == MU_VER_ID_V10)) { /* Wait TX register to be empty. */ while (!(readl_relaxed(base + MU_V10_ASR_OFFSET1) & mask)) ; @@ -109,7 +110,7 @@ void MU_ReceiveMsg(void __iomem *base, uint32_t regIndex, uint32_t *msg) { uint32_t mask = MU_SR_RF0_MASK1 >> regIndex; - if (unlikely((readl_relaxed(base) >> 16) == MU_VER_ID_V10)) { + if (unlikely(version == MU_VER_ID_V10)) { /* Wait RX register to be full. */ while (!(readl_relaxed(base + MU_V10_ASR_OFFSET1) & mask)) ; @@ -129,9 +130,10 @@ void MU_Init(void __iomem *base) { uint32_t reg, offset; - offset = unlikely((readl_relaxed(base) >> 16) == MU_VER_ID_V10) - ? MU_V10_ACR_OFFSET1 : MU_ACR_OFFSET1; + version = readl_relaxed(base) >> 16; + offset = unlikely(version == MU_VER_ID_V10) + ? MU_V10_ACR_OFFSET1 : MU_ACR_OFFSET1; reg = readl_relaxed(base + offset); /* Clear GIEn, RIEn, TIEn, GIRn and ABFn. */