From: Liu Ying <victor.liu@nxp.com>
Date: Thu, 14 Nov 2019 08:10:09 +0000 (+0800)
Subject: arm64: imx8qm-ss-lvds.dtsi: Add pwm_lvds0/1 support
X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.0~577^2~2^2~640
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=43f3b0799b9ee6a69f1dc9b3632aa170d14f14db;p=linux.git

arm64: imx8qm-ss-lvds.dtsi: Add pwm_lvds0/1 support

This patch adds pwm_lvds0/1 support for
i.MX8QM LVDS subsystem device tree.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
---

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi
index ff54354fbd4c..1fe9afa12e03 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi
@@ -150,6 +150,19 @@
 			};
 		};
 
+		pwm_lvds0: pwm@56244000 {
+			compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm";
+			reg = <0x56244000 0x1000>;
+			clocks = <&lvds0_pwm_lpcg 0>,
+				 <&lvds0_pwm_lpcg 1>;
+			clock-names = "per", "ipg";
+			assigned-clocks = <&clk IMX_SC_R_LVDS_0_PWM_0 IMX_SC_PM_CLK_PER>;
+			assigned-clock-rates = <24000000>;
+			#pwm-cells = <2>;
+			power-domains = <&pd IMX_SC_R_LVDS_0_PWM_0>;
+			status = "disabled";
+		};
+
 		i2c1_lvds0: i2c@56247000 {
 			compatible = "fsl,imx8qm-lpi2c", "fsl,imx7ulp-lpi2c";
 			reg = <0x56247000 0x4000>;
@@ -303,6 +316,19 @@
 			};
 		};
 
+		pwm_lvds1: pwm@57244000 {
+			compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm";
+			reg = <0x57244000 0x1000>;
+			clocks = <&lvds1_pwm_lpcg 0>,
+				 <&lvds1_pwm_lpcg 1>;
+			clock-names = "per", "ipg";
+			assigned-clocks = <&clk IMX_SC_R_LVDS_1_PWM_0 IMX_SC_PM_CLK_PER>;
+			assigned-clock-rates = <24000000>;
+			#pwm-cells = <2>;
+			power-domains = <&pd IMX_SC_R_LVDS_1_PWM_0>;
+			status = "disabled";
+		};
+
 		i2c1_lvds1: i2c@57247000 {
 			compatible = "fsl,imx8qm-lpi2c", "fsl,imx7ulp-lpi2c";
 			reg = <0x57247000 0x4000>;