From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Date: Mon, 24 Jun 2019 10:52:23 +0000 (+0200)
Subject: arm64: dts: renesas: r8a77990: Add cpg reset for DU
X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.0~3890^2~34^2~22
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=4193a39240fbeda2ee35232bd0a1deedd41d31aa;p=linux.git

arm64: dts: renesas: r8a77990: Add cpg reset for DU

Add CPG reset properties to DU node of E3 (r8a77990) SoC.

According to Laurent Pinchart, R-Car Gen3 reset is handled at the group
level so specifying one reset entry per group is sufficient.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index b4318661f35e..84d1f58e73e7 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -1766,6 +1766,8 @@
 			clocks = <&cpg CPG_MOD 724>,
 				 <&cpg CPG_MOD 723>;
 			clock-names = "du.0", "du.1";
+			resets = <&cpg 724>;
+			reset-names = "du.0";
 			vsps = <&vspd0 0 &vspd1 0>;
 			status = "disabled";