From: Ye Li <ye.li@nxp.com>
Date: Fri, 8 Mar 2019 09:29:56 +0000 (-0800)
Subject: MLK-21828-3 clk-imx8: fix get clk rate issue
X-Git-Tag: rel_imx_4.19.35_1.1.0~886
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=3fb0090f867dcea41419bcdb7ac60e0bdf5c32b1;p=u-boot.git

MLK-21828-3 clk-imx8: fix get clk rate issue

The SCFW get clock rate API only return u32, but we use a ulong to
get the value. The ulong variable is not initialized, so on stack
it higher 32 bits may not zero, and return invalid rate.

Signed-off-by: Ye Li <ye.li@nxp.com>
---

diff --git a/drivers/clk/imx/clk-imx8.c b/drivers/clk/imx/clk-imx8.c
index d03fcc2fdd..99e0d9819e 100644
--- a/drivers/clk/imx/clk-imx8.c
+++ b/drivers/clk/imx/clk-imx8.c
@@ -45,7 +45,7 @@ static struct imx8_clks imx8_clk_names[] = {
 static ulong imx8_clk_get_rate(struct clk *clk)
 {
 	sc_pm_clk_t pm_clk;
-	ulong rate;
+	u32 rate;
 	u16 resource;
 	int ret;