From: Robert Chiras Date: Fri, 1 Mar 2019 08:39:19 +0000 (+0200) Subject: MLK-20718-4: arm64: dts: imx8qm: Use DSI PHY_REF clk X-Git-Tag: rel_imx_4.19.35_1.1.0~743 X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=32fdadd93e93cd20dddd6e5b3cb4324e4886fc53;p=linux.git MLK-20718-4: arm64: dts: imx8qm: Use DSI PHY_REF clk Until now, the DSI PHY_REF clock was by default ON in SCFW, which made this clock unusable in kernel, therefore, this clock was set as CLK_DUMMY in DSI device nodes. Sinnce this clock was set to OFF in SCFW, now it can be used from kernel, so add it to device nodes so that the driver can use it properly. Signed-off-by: Robert Chiras Reviewed-by: Laurentiu Palcu --- diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index 58038ab9175e..d86fc529a7a6 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -1932,7 +1932,7 @@ clocks = <&clk IMX8QM_MIPI0_PXL_CLK>, <&clk IMX8QM_MIPI0_BYPASS_CLK>, - <&clk IMX8QM_CLK_DUMMY>; + <&clk IMX8QM_MIPI0_DSI_PHY_CLK>; clock-names = "pixel", "bypass", "phy_ref"; power-domains = <&pd_mipi0>; csr = <&mipi_dsi_csr1>; @@ -2355,7 +2355,7 @@ clocks = <&clk IMX8QM_MIPI1_PXL_CLK>, <&clk IMX8QM_MIPI1_BYPASS_CLK>, - <&clk IMX8QM_CLK_DUMMY>; + <&clk IMX8QM_MIPI1_DSI_PHY_CLK>; clock-names = "pixel", "bypass", "phy_ref"; power-domains = <&pd_mipi1>; csr = <&mipi_dsi_csr2>;