From: Anson Huang Date: Mon, 25 Jan 2016 14:19:03 +0000 (+0800) Subject: MLK-12262-2 ARM: imx: adjust LPDDR2 frequency scale flow for i.MX7D TO1.1 X-Git-Tag: C0P2-H0.0--20200415~3735 X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=308a2c8d6845870fd22a3f2c7c7092fb34724c84;p=linux.git MLK-12262-2 ARM: imx: adjust LPDDR2 frequency scale flow for i.MX7D TO1.1 LPDDR2 frequency scale flow needs to be updated for i.MX7D TO1.1 due to the CKE timing change. Signed-off-by: Anson Huang --- diff --git a/arch/arm/mach-imx/lpddr3_freq_imx.S b/arch/arm/mach-imx/lpddr3_freq_imx.S index b122f797f2e8..da85b7cee780 100644 --- a/arch/arm/mach-imx/lpddr3_freq_imx.S +++ b/arch/arm/mach-imx/lpddr3_freq_imx.S @@ -242,6 +242,20 @@ ldr r7, =0x8 str r7, [r5, #DDRPHY_OFFSETW_CON2] + /* LPDDR2 and LPDDR3 has different setting */ + ldr r8, [r4, #DDRC_MSTR] + ands r8, r8, #0x4 + beq 15f + + ldr r7, =0x08080808 + str r7, [r5, #DDRPHY_CA_DSKEW_CON0] + str r7, [r5, #DDRPHY_CA_DSKEW_CON1] + ldr r7, =0x0a0a0808 + str r7, [r5, #DDRPHY_CA_DSKEW_CON2] + ldr r7, =0x0a0a0a0a + str r7, [r5, #DDRPHY_CA_WLDSKEW_CON0] + b 14f +15: ldr r7, [r9, #ANADIG_DIGPROG] and r7, r7, #0x11 cmp r7, #0x10