From: Han Xu <b45815@freescale.com>
Date: Fri, 5 Jun 2015 20:09:18 +0000 (-0500)
Subject: MLK-11061: ARM:dts: enable ddr quad mode for QSPI on 6UL ARM2 and 7D ARM2
X-Git-Tag: C0P2-H0.0--20200415~3956
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=2ddfd01fa4997f7261815d973d7346eb1184c05c;p=linux.git

MLK-11061: ARM:dts: enable ddr quad mode for QSPI on 6UL ARM2 and 7D ARM2

Enable DDR Quad mode for QSPI on 6UL ARM2 and 7D ARM2 board to improve
the performance.

Signed-off-by: Han Xu <b45815@freescale.com>
(cherry picked and merge from commit ba6c2f00b5b000996bf8acbbd62c30d8f8f61182)
---

diff --git a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-qspi.dts b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-qspi.dts
index 4f2eb331b18d..ede6df2347b9 100644
--- a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-qspi.dts
+++ b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-qspi.dts
@@ -50,6 +50,7 @@
 		#size-cells = <1>;
 		compatible = "micron,n25q256a";
 		spi-max-frequency = <29000000>;
+		spi-nor,ddr-quad-read-dummy = <6>;
 		reg = <0>;
 	};
 
@@ -58,6 +59,7 @@
 		#size-cells = <1>;
 		compatible = "micron,n25q256a";
 		spi-max-frequency = <29000000>;
+		spi-nor,ddr-quad-read-dummy = <6>;
 		reg = <1>;
 	};
 
@@ -66,6 +68,7 @@
 		#size-cells = <1>;
 		compatible = "micron,n25q256a";
 		spi-max-frequency = <29000000>;
+		spi-nor,ddr-quad-read-dummy = <6>;
 		reg = <2>;
 	};
 
@@ -74,6 +77,7 @@
 		#size-cells = <1>;
 		compatible = "micron,n25q256a";
 		spi-max-frequency = <29000000>;
+		spi-nor,ddr-quad-read-dummy = <6>;
 		reg = <3>;
 	};
 };