From: Ye Li <ye.li@nxp.com>
Date: Wed, 11 Jul 2018 10:17:14 +0000 (-0700)
Subject: MLK-18823 mx6ul/mx6ull: Add workaround for LCDIF display when optee enabled
X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.0~529
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=1ced0da9d330af8afe5d71148189cd26e221289c;p=u-boot.git

MLK-18823 mx6ul/mx6ull: Add workaround for LCDIF display when optee enabled

In optee enabled defconfig, the trust zone is enabled in DCD. On iMX6UL/ULL, there
is IC limitation that LCDIF master access can only be non-secure, because PL301
hard code the m_3/4/5 to non-secure masters. It causes LCDIF fails to fetch data
from memory.

This patch adds a workaround to change trust zone Region 0 attribute to allow both secure
and non-secure read/write. So it permits the LCDIF master access to memory.
Since optee will configure Region 0 by itself, this should not introduce problem to optee.

Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 85be73bb5bab319c096f0893729835b3ceddafde)
(cherry picked from commit a7ab49a0856caea6114b4f9d1f6cddb75c944c33)
(cherry picked from commit 5a54394012b76adbd7efe2aa2cea8a8dade860c0)
(cherry picked from commit f27090f07733d322108c0798bad3770adf527794)
(cherry picked from commit b40b9e0d3d102dc4c60c35a2df673f4800af37ae)
(cherry picked from commit 2e9054ad2f62444449b2b9e273c4cc779169979e)
---

diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index d652176eb4..52692f09fd 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -4,6 +4,7 @@
  * Sascha Hauer, Pengutronix
  *
  * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2018 NXP
  */
 
 #include <common.h>
@@ -612,6 +613,19 @@ int arch_cpu_init(void)
 			0x3, MX6UL_SNVS_LP_BASE_ADDR);
 	}
 
+	if (is_mx6ull() || is_mx6ul()) {
+		struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+		if (iomux->gpr[9] & 0x1) {
+			/* When trust zone is enabled,
+			 * set Region 0 attribute to allow secure and non-secure read/write permission
+			 * Because PL301 hard code to non-secure for some masters on m_3/4/5 ports.
+			 * Like LCDIF, PXP, CSI can't work with secure memory.
+			 */
+
+			writel(0xf0000000, IP2APB_TZASC1_BASE_ADDR + 0x108);
+		}
+	}
+
 	/* Set perclk to source from OSC 24MHz */
 	if (has_err007805())
 		setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK);