From: Josep Orga <jorga@somdevices.com>
Date: Thu, 16 Jan 2020 12:04:17 +0000 (+0100)
Subject: imx6ull-somdevices-C8P1.dts: Added and changed Makefile.
X-Git-Tag: C0P2-H0.0--20200415~9
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=186536e78657e030bbf6b2949c8dc75b6c84e6c7;p=linux.git

imx6ull-somdevices-C8P1.dts: Added and changed Makefile.
mach-imx6ul.c: Added imx6ul_sai_clk_init function.

Signed-off-by: Josep Orga <jorga@somdevices.com>
---

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4629c54c5417..5320a035554b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -534,7 +534,8 @@ dtb-$(CONFIG_SOC_IMX6ULL) += \
 	imx6ull-9x9-evk-btwifi.dtb \
 	imx6ull-9x9-evk-btwifi-oob.dtb \
 	imx6ull-9x9-evk-ldo.dtb \
-	imx6ull-somdevices-C0P1.dtb
+	imx6ull-somdevices-C0P1.dtb \
+	imx6ull-somdevices-C8P1.dtb
 dtb-$(CONFIG_SOC_IMX6SLL) += \
 	imx6sll-lpddr2-arm2.dtb \
 	imx6sll-lpddr3-arm2.dtb \
diff --git a/arch/arm/boot/dts/imx6ull-somdevices-C8P1.dts b/arch/arm/boot/dts/imx6ull-somdevices-C8P1.dts
new file mode 100644
index 000000000000..256fef6bcf21
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-somdevices-C8P1.dts
@@ -0,0 +1,124 @@
+#define MMC_SPI
+
+#include "imx6ull-somdevices.dtsi"
+
+/ {
+	leds {
+		led1 {
+			label = "red";
+			gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+		led2 {
+			label = "green";
+			gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+		led3 {
+			label = "blue";
+			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+		led4 {
+			label = "white";
+			gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_keys>;
+
+		button0 {
+			label = "BUTTON_-";
+			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; //button_-
+			linux,code = <KEY_F1>;
+			gpio-key,wakeup;
+		};
+		button1 {
+			label = "BUTTON_+";
+			gpios = <&gpio4 13 GPIO_ACTIVE_LOW>; //button_+
+			linux,code = <KEY_F2>;
+			gpio-key,wakeup;
+		};
+		button2 {
+			label = "BUTTON_CH";
+			gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; //button_ch
+			linux,code = <KEY_F3>;
+			gpio-key,wakeup;
+		};
+		button3 {
+			label = "BUTTON_RESTORE";
+			gpios = <&gpio4 16 GPIO_ACTIVE_LOW>; //button_restore
+			linux,code = <KEY_F4>;
+			gpio-key,wakeup;
+		};
+	};
+
+	sound {
+		compatible = "somdevices,imx6ul-sgtl5000",
+			     "simple-audio-card";
+		simple-audio-card,name = "imx6ul-sgtl5000-audio";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,bitclock-master = <&codec_dai>;
+		simple-audio-card,frame-master = <&codec_dai>;
+		simple-audio-card,widgets =
+			"Microphone", "Mic Jack",
+			"Line", "Line In",
+			"Line", "Line Out",
+			"Headphone", "Headphone Jack";
+		simple-audio-card,routing =
+			"MIC_IN", "Mic Jack",
+			"Mic Jack", "Mic Bias",
+			"Headphone Jack", "HP_OUT";
+
+		cpu_dai: simple-audio-card,cpu {
+			sound-dai = <&sai2>;
+		};
+
+		codec_dai: simple-audio-card,codec {
+			sound-dai = <&sgtl5000>;
+		};
+	};
+};
+
+&i2c1 {
+	pcf8563@51 {
+		compatible = "nxp,pcf8563";
+		reg = <0x51>;
+	};
+
+	sgtl5000: codec@a {
+		compatible = "fsl,sgtl5000";
+		reg = <0x0a>;
+		#sound-dai-cells = <0>;
+		VDDA-supply = <&reg_sd1_vmmc>;
+		VDDIO-supply = <&reg_sd1_vmmc>;
+		clocks = <&clks IMX6UL_CLK_SAI2>;
+		clock-names = "mclk";
+		wlf,shared-lrclk;
+	};
+
+	/*TODO: Check if 24AA025E48T-I/OT can be set
+	eeprom@53 {
+		compatible = "microchip,24c512";
+		reg = <0x53>;
+	};*/
+};
+
+&iomuxc {
+	pinctrl_keys: keys {
+		fsl,pins = <
+			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0x1b0b0 //GPIO02
+		>;
+	};
+};
+
+&sai2 {
+	#sound-dai-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai2>;
+	status = "okay";
+};
diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c
index 1c4f7ee48394..a660ded7d4ce 100644
--- a/arch/arm/mach-imx/mach-imx6ul.c
+++ b/arch/arm/mach-imx/mach-imx6ul.c
@@ -44,7 +44,24 @@ static void __init imx6ul_enet_clk_init(void)
 	}
 	else
 		pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
+}
 
+static void __init imx6ul_sai_clk_init(void)
+{
+	struct regmap *gpr;
+	volatile uint32_t* pad_mck;
+	//TODO: Make imx6ul_sai_clk_init properly
+	gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
+	if (!IS_ERR(gpr)) {
+		//Set SAI2_MCLK as output
+		regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_SAI2_MCLK_DIR,
+				   MCLK_DIR(2));
+		//Set MUX SAI2_MCLK to JTAG_TMS pin
+		pad_mck = (volatile uint32_t*)ioremap(0x020e0048, 16);
+		writel(0x2, pad_mck);
+	}
+	else
+		pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
 }
 
 static int ksz8081_phy_fixup(struct phy_device *dev)
@@ -174,6 +191,7 @@ static inline void imx6ul_enet_init(void)
 {
 	imx6ul_enet_clk_init();
 	imx6ul_enet_phy_init();
+	imx6ul_sai_clk_init();
 	if (cpu_is_imx6ul())
 		imx6_enet_mac_init("fsl,imx6ul-fec", "fsl,imx6ul-ocotp");
 	else