From: Peng Fan Date: Tue, 13 Aug 2019 03:28:33 +0000 (+0800) Subject: MLK-22429 imx8mn: fix audio pll setting X-Git-Tag: rel_imx_4.19.35_1.1.0~111 X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=179126f225738d377d0b3d3cd9cf5c13c443c561;p=linux.git MLK-22429 imx8mn: fix audio pll setting The AUDIO PLL max support 650M, so the original clk settings violate spec. In order not to impact audio functionality, let's div the clk by 2. Signed-off-by: Peng Fan Reviewed-by: Shengjiu Wang --- diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mn-ddr4-evk.dts index 774811de85ca..3e44a615b214 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mn-ddr4-evk.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mn-ddr4-evk.dts @@ -110,7 +110,7 @@ &clk { assigned-clocks = <&clk IMX8MN_AUDIO_PLL1>, <&clk IMX8MN_AUDIO_PLL2>; - assigned-clock-rates = <786432000>, <722534400>; + assigned-clock-rates = <393216000>, <361267200>; }; &easrc { diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index 48462dedc438..88d61f7e19e3 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -78,8 +78,8 @@ static const struct imx_pll14xx_rate_table imx8mn_intpll_tbl[] = { }; static const struct imx_pll14xx_rate_table imx8mn_audiopll_tbl[] = { - PLL_1443X_RATE(786432000U, 262, 2, 2, 9437), - PLL_1443X_RATE(722534400U, 361, 3, 2, 17511), + PLL_1443X_RATE(393216000U, 262, 2, 3, 9437), + PLL_1443X_RATE(361267200U, 361, 3, 3, 17511), }; static const struct imx_pll14xx_rate_table imx8mn_videopll_tbl[] = {