From: Josep Orga <jorga@somdevices.com>
Date: Thu, 28 Oct 2021 15:47:51 +0000 (+0200)
Subject: arm64: dts: imx8mn-somdevices.dtsi: Add gpio pinctrl to i2c1 pins.
X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.0~10
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=0d71bd0c4cfa953f81054eabeac7e3f3252de86c;p=linux.git

arm64: dts: imx8mn-somdevices.dtsi: Add gpio pinctrl to i2c1 pins.

Signed-off-by: Josep Orga <jorga@somdevices.com>
---

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-somdevices.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-somdevices.dtsi
index f2fc97a22042..5bc09a2ec7d8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-somdevices.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-somdevices.dtsi
@@ -173,6 +173,9 @@
 	clock-frequency = <400000>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c1>;
+	pinctrl-1 = <&pinctrl_i2c1_gpio>;
+	scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>;
+	sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 
 	dsi_lvds_bridge: sn65dsi84@2c {
@@ -631,6 +634,13 @@
 		>;
 	};
 
+	pinctrl_i2c1_gpio: i2c1grp-gpio {
+		fsl,pins = <
+			MX8MN_IOMUXC_I2C1_SCL_GPIO5_IO14		0x1c3
+			MX8MN_IOMUXC_I2C1_SDA_GPIO5_IO15		0x1c3
+		>;
+	};
+
 	pinctrl_i2c2: i2c2grp {
 		fsl,pins = <
 			MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c3