From: Sandor Yu <Sandor.yu@nxp.com>
Date: Thu, 20 May 2021 05:48:49 +0000 (+0800)
Subject: LF-3803: drm: imx: mhdp: Move phy_power function to encoder_enable
X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.0~67
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=05a298104b4f9f4dd1381cd70de09bb615a81103;p=linux.git

LF-3803: drm: imx: mhdp: Move phy_power function to encoder_enable

Split power up function to arc and phy only power up functions.
Move phy power up function to encoder_enable.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
---

diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c
index f96b200885df..0b4a52c2d48f 100644
--- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c
+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c
@@ -638,7 +638,7 @@ static int hdmi_phy_cfg_ss28fdsoi(struct cdns_mhdp_device *mhdp,
 	return char_freq;
 }
 
-static int hdmi_phy_power_up(struct cdns_mhdp_device *mhdp)
+static int hdmi_arc_power_up(struct cdns_mhdp_device *mhdp)
 {
 	u32 val, i;
 
@@ -665,23 +665,6 @@ static int hdmi_phy_power_up(struct cdns_mhdp_device *mhdp)
 	/* Power up ARC */
 	hdmi_arc_config(mhdp);
 
-	/* Configure PHY in A0 mode (PHY must be in the A0 power
-	 * state in order to transmit data)
-	 */
-	//cdns_phy_reg_write(mhdp, PHY_HDP_MODE_CTRL, 0x0101); //imx8mq
-	cdns_phy_reg_write(mhdp, PHY_HDP_MODE_CTRL, 0x0001);
-
-	/* Wait for Power State A0 Ack */
-	for (i = 0; i < 10; i++) {
-		val = cdns_phy_reg_read(mhdp, PHY_HDP_MODE_CTRL);
-		if (val & (1 << 4))
-			break;
-		msleep(20);
-	}
-	if (i == 10) {
-		dev_err(mhdp->dev, "Wait A0 Ack failed\n");
-		return -1;
-	}
 	return 0;
 }
 
@@ -715,7 +698,7 @@ int cdns_hdmi_phy_set_imx8mq(struct cdns_mhdp_device *mhdp)
 		return -EINVAL;
 	}
 
-	ret = hdmi_phy_power_up(mhdp);
+	ret = hdmi_arc_power_up(mhdp);
 	if (ret < 0)
 		return ret;
 
@@ -757,7 +740,7 @@ int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *mhdp)
 	}
 	imx8qm_phy_reset(1);
 
-	ret = hdmi_phy_power_up(mhdp);
+	ret = hdmi_arc_power_up(mhdp);
 	if (ret < 0)
 		return ret;
 
@@ -766,6 +749,29 @@ int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *mhdp)
 	return true;
 }
 
+int cdns_hdmi_phy_power_up(struct cdns_mhdp_device *mhdp)
+{
+	u32 val, i;
+
+	/* Configure PHY in A0 mode (PHY must be in the A0 power
+	 * state in order to transmit data)
+	 */
+	cdns_phy_reg_write(mhdp, PHY_HDP_MODE_CTRL, 0x0001);
+
+	/* Wait for Power State A0 Ack */
+	for (i = 0; i < 10; i++) {
+		val = cdns_phy_reg_read(mhdp, PHY_HDP_MODE_CTRL);
+		if (val & (1 << 4))
+			break;
+		msleep(20);
+	}
+	if (i == 10) {
+		dev_err(mhdp->dev, "Wait A0 Ack failed\n");
+		return -1;
+	}
+	return 0;
+}
+
 int cdns_hdmi_phy_shutdown(struct cdns_mhdp_device *mhdp)
 {
 	int timeout;
diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c
index 4c4ce9d3c847..2cf7eeab84c3 100644
--- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c
+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c
@@ -32,6 +32,7 @@ static void cdns_mhdp_imx_encoder_enable(struct drm_encoder *encoder)
 	struct cdns_mhdp_device *mhdp = bridge->driver_private;
 
 	cdns_mhdp_plat_call(mhdp, plat_deinit);
+	cdns_hdmi_phy_power_up(mhdp);
 }
 
 static int cdns_mhdp_imx_encoder_atomic_check(struct drm_encoder *encoder,
diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h
index 9035f1f71eee..7d4fdfc4e3f8 100644
--- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h
+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h
@@ -153,4 +153,5 @@ bool cdns_hdmi_phy_video_valid_imx8qm(struct cdns_mhdp_device *hdp);
 int cdns_hdmi_phy_set_imx8mq(struct cdns_mhdp_device *hdp);
 int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *hdp);
 int cdns_hdmi_phy_shutdown(struct cdns_mhdp_device *mhdp);
+int cdns_hdmi_phy_power_up(struct cdns_mhdp_device *mhdp);
 #endif /* _CDNS_MHDP_PHY_H */