From: Richard Zhu <hongxing.zhu@nxp.com>
Date: Wed, 16 Sep 2020 00:41:23 +0000 (+0800)
Subject: LF-2342 arm64: dts: imx8dxl: enable pcie
X-Git-Tag: rel_imx_5.10.35_2.0.0-somdevices.0~577^2~2^2~336
X-Git-Url: https://git.somdevices.com/?a=commitdiff_plain;h=0583bb5b076ee839d1c9a6f4440967380aef931d;p=linux.git

LF-2342 arm64: dts: imx8dxl: enable pcie

Enable PCIe on iMX8DXL EVK board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index 67d3cc8d0d75..908be4dc47d8 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -88,6 +88,25 @@
 		#reset-cells = <0>;
 	};
 
+	epdev_on: fixedregulator@100 {
+		compatible = "regulator-fixed";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-name = "epdev_on";
+		gpio = <&pca6416_1 13 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	pcie_clk_sel_ext: fixedregulator@103 {
+		compatible = "regulator-fixed";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-name = "clk_ext_sel";
+		gpio = <&pca6416_1 10 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-always-on;
+	};
+
 	reg_fec1_sel: regfec1_sel {
 		compatible = "regulator-fixed";
 		regulator-name = "fec1_supply";
@@ -354,6 +373,17 @@
 	status = "okay";
 };
 
+&pcieb{
+	compatible = "fsl,imx8qxp-pcie","snps,dw-pcie";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcieb>;
+	clkreq-gpio = <&lsio_gpio4 1 GPIO_ACTIVE_LOW>;
+	reset-gpio = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
+	ext_osc = <0>;
+	epdev_on-supply = <&epdev_on>;
+	status = "okay";
+};
+
 &thermal_zones {
 	pmic-thermal0 {
 		polling-delay-passive = <250>;
@@ -504,6 +534,14 @@
 		>;
 	};
 
+	pinctrl_pcieb: pcieagrp{
+		fsl,pins = <
+			IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00	0x06000021
+			IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01	0x06000021
+			IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02	0x04000021
+		>;
+	};
+
 	pinctrl_usdhc1: usdhc1grp {
 		fsl,pins = <
 			IMX8DXL_EMMC0_CLK_CONN_EMMC0_CLK	0x06000041