ARM: dts: rockchip: rename label and nodename pinctrl subnodes that end with gpio

A test with the command below gives for example this error:

arch/arm/boot/dts/rk3288-tinker.dt.yaml: tsadc: otp-gpio:
{'phandle': [[54]], 'rockchip,pins': [[0, 10, 0, 118]]}
is not of type 'array'

'gpio' is a sort of reserved nodename and should not be used
for pinctrl in combination with 'rockchip,pins', so change
nodes that end with 'gpio' to end with 'pin' or 'pins'.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/
dtschema/schemas/gpio/gpio.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200524160636.16547-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index b0fd92b..3236abb 100644 (file)
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -520,9 +520,9 @@
                resets = <&cru SRST_TSADC>;
                reset-names = "tsadc-apb";
                pinctrl-names = "init", "default", "sleep";
-               pinctrl-0 = <&otp_gpio>;
+               pinctrl-0 = <&otp_pin>;
                pinctrl-1 = <&otp_out>;
-               pinctrl-2 = <&otp_gpio>;
+               pinctrl-2 = <&otp_pin>;
                #thermal-sensor-cells = <0>;
                rockchip,hw-tshut-temp = <95000>;
                status = "disabled";
@@ -1111,7 +1111,7 @@
                };
 
                tsadc {
-                       otp_gpio: otp-gpio {
+                       otp_pin: otp-pin {
                                rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
                        };
 

diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
index 171ba61..8efba9d 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-jaq.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
@@ -47,7 +47,7 @@
 &sdmmc {
        disable-wp;
        pinctrl-names = "default";
-       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
+       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
                        &sdmmc_bus4>;
 };
 

diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
index 66f00d2..2c916c5 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
@@ -192,7 +192,7 @@
 &sdmmc {
        disable-wp;
        pinctrl-names = "default";
-       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
+       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
                        &sdmmc_bus4>;
 };
 

diff --git a/arch/arm/boot/dts/rk3288-veyron-mighty.dts b/arch/arm/boot/dts/rk3288-veyron-mighty.dts
index 27fbc07..fa695a8 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-mighty.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-mighty.dts
@@ -18,8 +18,8 @@
 };
 
 &sdmmc {
-       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
-                       &sdmmc_wp_gpio &sdmmc_bus4>;
+       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
+                       &sdmmc_wp_pin &sdmmc_bus4>;
        wp-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
 
        /delete-property/ disable-wp;
@@ -27,7 +27,7 @@
 
 &pinctrl {
        sdmmc {
-               sdmmc_wp_gpio: sdmmc-wp-gpio {
+               sdmmc_wp_pin: sdmmc-wp-pin {
                        rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
                };
        };

diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
index 383fad1..f8b69e0 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
@@ -114,7 +114,7 @@
 &sdmmc {
        disable-wp;
        pinctrl-names = "default";
-       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
+       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
                        &sdmmc_bus4>;
 };
 

diff --git a/arch/arm/boot/dts/rk3288-veyron-pinky.dts b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
index 71e6629..4e9fdb0 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-pinky.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
@@ -105,7 +105,7 @@
        };
 
        sdmmc {
-               sdmmc_wp_gpio: sdmmc-wp-gpio {
+               sdmmc_wp_pin: sdmmc-wp-pin {
                        rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
                };
        };
@@ -126,8 +126,8 @@
 
 &sdmmc {
        pinctrl-names = "default";
-       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
-                    &sdmmc_wp_gpio &sdmmc_bus4>;
+       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
+                    &sdmmc_wp_pin &sdmmc_bus4>;
        wp-gpios = <&gpio7 RK_PB2 GPIO_ACTIVE_HIGH>;
 };
 

diff --git a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
index fe950f9..27fb06c 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
@@ -41,7 +41,7 @@
                };
 
                /* This is where we actually hook up CD */
-               sdmmc_cd_gpio: sdmmc-cd-gpio {
+               sdmmc_cd_pin: sdmmc-cd-pin {
                        rockchip,pins = <7 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
                };
        };

diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
index e354c61..4a3ea93 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
@@ -54,7 +54,7 @@
 &sdmmc {
        disable-wp;
        pinctrl-names = "default";
-       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
+       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
                        &sdmmc_bus4>;
 };
 

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 2e1edd8..84d5946 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -574,9 +574,9 @@
                resets = <&cru SRST_TSADC>;
                reset-names = "tsadc-apb";
                pinctrl-names = "init", "default", "sleep";
-               pinctrl-0 = <&otp_gpio>;
+               pinctrl-0 = <&otp_pin>;
                pinctrl-1 = <&otp_out>;
-               pinctrl-2 = <&otp_gpio>;
+               pinctrl-2 = <&otp_pin>;
                #thermal-sensor-cells = <1>;
                rockchip,grf = <&grf>;
                rockchip,hw-tshut-temp = <95000>;
@@ -1929,7 +1929,7 @@
                };
 
                tsadc {
-                       otp_gpio: otp-gpio {
+                       otp_pin: otp-pin {
                                rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
                        };
 

diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index f9cfe2c..a5d130b 100644 (file)
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -351,9 +351,9 @@
                clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
                clock-names = "tsadc", "apb_pclk";
                pinctrl-names = "init", "default", "sleep";
-               pinctrl-0 = <&otp_gpio>;
+               pinctrl-0 = <&otp_pin>;
                pinctrl-1 = <&otp_out>;
-               pinctrl-2 = <&otp_gpio>;
+               pinctrl-2 = <&otp_pin>;
                resets = <&cru SRST_TSADC>;
                reset-names = "tsadc-apb";
                rockchip,hw-tshut-temp = <120000>;
@@ -728,7 +728,7 @@
                                                <0 RK_PC6 3 &pcfg_pull_none>;
                        };
 
-                       i2c2m1_gpio: i2c2m1-gpio {
+                       i2c2m1_pins: i2c2m1-pins {
                                rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
                                                <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
                        };
@@ -740,7 +740,7 @@
                                                <1 RK_PD4 2 &pcfg_pull_none>;
                        };
 
-                       i2c2m05v_gpio: i2c2m05v-gpio {
+                       i2c2m05v_pins: i2c2m05v-pins {
                                rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
                                                <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
                        };
@@ -867,7 +867,7 @@
                                rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>;
                        };
 
-                       otp_gpio: otp-gpio {
+                       otp_pin: otp-pin {
                                rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
                        };
                };
@@ -886,7 +886,7 @@
                                rockchip,pins = <3 RK_PA3 1 &pcfg_pull_none>;
                        };
 
-                       uart0_rts_gpio: uart0-rts-gpio {
+                       uart0_rts_pin: uart0-rts-pin {
                                rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
                        };
                };