MLK-11375-1 ARM: imx: bypass pmic ready for imx6sx

i.MX6SX has same design as i.MX6SL which has bypass
pmic ready signal, as we do NOT enable this function,
so need to bypass it during suspend/resume.

Signed-off-by: Anson Huang <b20788@freescale.com>

diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index 9d3d0bd..6b10b62 100644 (file)
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -377,7 +377,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
                val |= 0x2 << BP_CLPCR_LPM;
                val &= ~BM_CLPCR_VSTBY;
                val &= ~BM_CLPCR_SBYOS;
-               if (cpu_is_imx6sl())
+               if (cpu_is_imx6sl() || cpu_is_imx6sx())
                        val |= BM_CLPCR_BYPASS_PMIC_READY;
                if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul())
                        val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;