MLK-25454-2: dts: imx8mp: Change hdmi_apb clock rate to 133MHz

According iMX8MP formal datasheet, the clock rate of hdmi_apb
should set to 133MHz.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 60123c889996e812904cf1156b1b1fd84e0c598c)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index bf3daad..3853084 100755 (executable)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1871,8 +1871,8 @@
                                clocks = <&hdmi_blk_ctrl IMX8MP_CLK_HDMI_BLK_CTRL_IRQS_STEER_CLK>;
                                clock-names = "ipg";
                                assigned-clocks = <&clk IMX8MP_CLK_HDMI_APB>;
-                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
-                               assigned-clock-rates = <200000000>;
+                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_133M>;
+                               assigned-clock-rates = <133000000>;
                                resets = <&hdmi_blk_ctrl IMX8MP_HDMI_BLK_CTRL_IRQ_STEER_RESET>;
                                status = "disabled";
                        };
@@ -1914,8 +1914,8 @@
                                assigned-clocks =  <&clk IMX8MP_CLK_HDMI_AXI>,
                                                                <&clk IMX8MP_CLK_HDMI_APB>;
                                assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>,
-                                                        <&clk IMX8MP_SYS_PLL1_800M>;
-                               assigned-clock-rates = <500000000>, <200000000>;
+                                                        <&clk IMX8MP_SYS_PLL1_133M>;
+                               assigned-clock-rates = <500000000>, <133000000>;
                                interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-parent = <&irqsteer_hdmi>;
                                resets = <&hdmi_blk_ctrl IMX8MP_HDMI_BLK_CTRL_LCDIF_RESET>;
@@ -1954,10 +1954,10 @@
                                assigned-clocks = <&clk IMX8MP_CLK_HDMI_APB>,
                                                        <&clk IMX8MP_CLK_HDMI_AXI>,
                                                        <&clk IMX8MP_CLK_HDMI_24M>;
-                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
+                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_133M>,
                                                        <&clk IMX8MP_SYS_PLL2_500M>,
                                                        <&clk IMX8MP_CLK_24M>;
-                               assigned-clock-rates = <200000000>, <500000000>, <24000000>;
+                               assigned-clock-rates = <133000000>, <500000000>, <24000000>;
                                phys = <&hdmiphy>;
                                phy-names = "hdmi";
                                resets = <&hdmi_blk_ctrl IMX8MP_HDMI_BLK_CTRL_HDMI_TX_RESET>;