arm64: imx8qxp-ss-lvds.dtsi: Add properties of aux ldb to support split mode

This patch adds properties of auxiliary ldb to support LDB split mode
for i.MX8QXP MIPI DSI/LVDS subsystem device tree.

Signed-off-by: Liu Ying <victor.liu@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi
index 86668c1..d3d4719 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi
@@ -124,10 +124,15 @@
                        #size-cells = <0>;
                        compatible = "fsl,imx8qxp-ldb";
                        clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>,
-                                <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>;
-                       clock-names = "pixel", "bypass";
-                       power-domains = <&pd IMX_SC_R_LVDS_0>;
+                                <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>,
+                                <&clk IMX_SC_R_LVDS_1 IMX_SC_PM_CLK_MISC2>,
+                                <&clk IMX_SC_R_LVDS_1 IMX_SC_PM_CLK_BYPASS>;
+                       clock-names = "pixel", "bypass",
+                                     "aux_pixel", "aux_bypass";
+                       power-domains = <&pd IMX_SC_R_LVDS_0>,
+                                       <&pd IMX_SC_R_LVDS_1>;
                        gpr = <&lvds_region1>;
+                       fsl,auxldb = <&ldb2>;
                        status = "disabled";
 
                        lvds-channel@0 {
@@ -227,10 +232,15 @@
                        #size-cells = <0>;
                        compatible = "fsl,imx8qxp-ldb";
                        clocks = <&clk IMX_SC_R_LVDS_1 IMX_SC_PM_CLK_MISC2>,
-                                <&clk IMX_SC_R_LVDS_1 IMX_SC_PM_CLK_BYPASS>;
-                       clock-names = "pixel", "bypass";
-                       power-domains = <&pd IMX_SC_R_LVDS_1>;
+                                <&clk IMX_SC_R_LVDS_1 IMX_SC_PM_CLK_BYPASS>,
+                                <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>,
+                                <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>;
+                       clock-names = "pixel", "bypass",
+                                     "aux_pixel", "aux_bypass";
+                       power-domains = <&pd IMX_SC_R_LVDS_1>,
+                                       <&pd IMX_SC_R_LVDS_0>;
                        gpr = <&lvds_region2>;
+                       fsl,auxldb = <&ldb1>;
                        status = "disabled";
 
                        lvds-channel@0 {