Introduce FSL_SAI_CLK_BIT clock id in order to distinguish
the bit clock and master clocks in "set_sysclk" API.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Suggested-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
if (dir == SND_SOC_CLOCK_IN)
return 0;
- sai->bitclk_freq = freq;
+ if (clk_id == FSL_SAI_CLK_BIT) {
+ sai->bitclk_freq = freq;
+ return 0;
+ }
ret = fsl_sai_set_dai_sysclk_tr(cpu_dai, clk_id, freq,
FSL_FMT_TRANSMITTER);
#define FSL_SAI_CLK_MAST3 3
#define FSL_SAI_MCLK_MAX 4
+#define FSL_SAI_CLK_BIT 5
/* SAI data transfer numbers per DMA request */
#define FSL_SAI_MAXBURST_TX 6