MLK-14781-2: ARM: dts: change audio pll frequency for ssi master mode

Original frequency 786.432MHz can't be divide to frequency 2.304MHz
which is needed by 48kHz/24bit/2channel, So update the pll frequency
for 24bit case.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index c51c44a..fb41510 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -999,7 +999,7 @@
        assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>,
                                 <&clks IMX6QDL_CLK_PLL4>,
                                 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
-       assigned-clock-rates = <786432000>, <0>, <0>;
+       assigned-clock-rates = <1179648000>, <0>, <0>;
        status = "okay";
 };