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clk: stm32: Add clk entry for SDMMC2 on stm32F769
author
Patrice Chotard
<patrice.chotard@st.com>
Mon, 12 Mar 2018 09:04:07 +0000
(10:04 +0100)
committer
Stephen Boyd
<sboyd@kernel.org>
Mon, 19 Mar 2018 20:46:07 +0000
(13:46 -0700)
STM32F769 has 2 SDMMC port, add clock entry for the second one.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/clk-stm32f4.c
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diff --git
a/drivers/clk/clk-stm32f4.c
b/drivers/clk/clk-stm32f4.c
index
3c28798
..
294850b
100644
(file)
--- a/
drivers/clk/clk-stm32f4.c
+++ b/
drivers/clk/clk-stm32f4.c
@@
-282,6
+282,7
@@
static const struct stm32f4_gate_data stm32f746_gates[] __initconst = {
{ STM32F4_RCC_APB2ENR, 0, "tim1", "apb2_mul" },
{ STM32F4_RCC_APB2ENR, 1, "tim8", "apb2_mul" },
+ { STM32F4_RCC_APB2ENR, 7, "sdmmc2", "sdmux" },
{ STM32F4_RCC_APB2ENR, 8, "adc1", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 9, "adc2", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 10, "adc3", "apb2_div" },
@@
-315,7
+316,7
@@
static const u64 stm32f46xx_gate_map[MAX_GATE_MAP] = { 0x000000f17ef417ffull,
static const u64 stm32f746_gate_map[MAX_GATE_MAP] = { 0x000000f17ef417ffull,
0x0000000000000003ull,
- 0x04f77f
0
33e01c9ffull };
+ 0x04f77f
8
33e01c9ffull };
static const u64 *stm32f4_gate_map;