MLK-24012-09 arm: dts: add imx7d pcie ep support
authorRichard Zhu <hongxing.zhu@nxp.com>
Tue, 15 Sep 2020 06:46:49 +0000 (14:46 +0800)
committerDong Aisheng <aisheng.dong@nxp.com>
Mon, 14 Dec 2020 03:23:15 +0000 (11:23 +0800)
Add the iMX7D PCIe EP mode, and verify the EP mode on SDB board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/imx7d-sdb-pcie-ep.dts [new file with mode: 0644]
arch/arm/boot/dts/imx7d.dtsi

index 54cf183..bcb0867 100644 (file)
@@ -715,6 +715,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
        imx7d-sdb-qspi.dtb \
        imx7d-sdb-reva.dtb \
        imx7d-sdb-sht11.dtb \
+       imx7d-sdb-pcie-ep.dtb \
        imx7d-12x12-lpddr3-val.dtb \
        imx7d-12x12-lpddr3-val-sai.dtb \
        imx7d-zii-rmu2.dtb \
diff --git a/arch/arm/boot/dts/imx7d-sdb-pcie-ep.dts b/arch/arm/boot/dts/imx7d-sdb-pcie-ep.dts
new file mode 100644 (file)
index 0000000..78ebede
--- /dev/null
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+
+#include "imx7d-sdb.dts"
+
+&pcie{
+       status = "disabled";
+};
+
+&pcie_ep{
+       status = "okay";
+};
index 90aa41c..bafac01 100644 (file)
                status = "disabled";
        };
 
+       pcie_ep: pcie_ep@33800000 {
+               compatible = "fsl,imx7d-pcie-ep";
+               reg = <0x33800000 0x4000>, <0x40000000 0x10000000>;
+               reg-names = "regs", "addr_space";
+               num-lanes = <1>;
+               clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>,
+                        <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,
+                        <&clks IMX7D_PCIE_PHY_ROOT_CLK>;
+               clock-names = "pcie", "pcie_bus", "pcie_phy";
+               assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>,
+                                 <&clks IMX7D_PCIE_PHY_ROOT_SRC>;
+               assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>,
+                                        <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
+
+               fsl,max-link-speed = <2>;
+               power-domains = <&pgc_pcie_phy>;
+               resets = <&src IMX7_RESET_PCIEPHY>,
+                        <&src IMX7_RESET_PCIE_CTRL_APPS_EN>,
+                        <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>;
+               reset-names = "pciephy", "apps", "turnoff";
+               fsl,imx7d-pcie-phy = <&pcie_phy>;
+               num-ib-windows = <4>;
+               num-ob-windows = <4>;
+               status = "disabled";
+       };
+
        rpmsg: rpmsg{
                compatible = "fsl,imx7d-rpmsg";
                /* up to now, the following channels are used in imx rpmsg