#include "hardware.h"
#include "smc_sip.h"
+
+extern unsigned int ddr_normal_rate;
+static int curr_ddr_rate;
+
+#ifdef CONFIG_SMP
/*
* External declaration
*/
extern unsigned long imx_smp_wfe_start asm("imx_smp_wfe_optee");
extern unsigned long imx_smp_wfe_end asm("imx_smp_wfe_optee_end");
-extern unsigned int ddr_normal_rate;
extern unsigned long ddr_freq_change_iram_base;
static uint32_t *irqs_for_wfe;
static void __iomem *gic_dist_base;
-static int curr_ddr_rate;
-
-#ifdef CONFIG_SMP
/**
* @brief Switch all active cores, except the one changing the
* bus frequency, in WFE mode until completion of the
uint32_t all_cpus = 0;
#endif
- pr_debug("\nBusfreq DDR3 OPTEE set from %d to %d start...\n",
+ pr_debug("\nBusfreq OPTEE set from %d to %d start...\n",
curr_ddr_rate, ddr_rate);
if (ddr_rate == curr_ddr_rate)
return 0;
}
+#ifdef CONFIG_SMP
static int init_freq_optee_smp(struct platform_device *busfreq_pdev)
{
struct device_node *node = 0;
return err;
}
+#else
+int init_freq_optee(struct platform_device *busfreq_pdev)
+{
+ curr_ddr_rate = ddr_normal_rate;
+ return 0;
+}
+#endif
static bool l2x0_flz_disable;
#ifdef CONFIG_OPTEE
+
+#ifndef CONFIG_SMP
+/*
+ * Redefine the arch_writelock/unlock functions not present
+ * in NO SMP mode
+ */
+#define arch_write_lock(lock) raw_spin_lock(lock)
+#define arch_write_unlock(lock) raw_spin_unlock(lock)
+#endif
+
struct l2x0_mutex {
arch_rwlock_t *mutex;
arch_rwlock_t nomutex;
static void spinlock_init(struct l2x0_mutex *spinlock)
{
spinlock->mutex = NULL;
+#ifdef CONFIG_SMP
spinlock->nomutex.lock = 0;
+#endif
}
static unsigned long local_lock(struct l2x0_mutex *spinlock)