MLK-14498-2 ARM: imx7d: clk: select uart clock parent and rate

Currently, it is failed to set clock rate in dts file that maybe some clock
patch miss. Now just set the clock parent and rate in clock driver.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c
index 7c977fe..b14d5c4 100644 (file)
--- a/drivers/clk/imx/clk-imx7d.c
+++ b/drivers/clk/imx/clk-imx7d.c
@@ -942,6 +942,11 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
        /* set parent of SIM1 root clock */
        imx_clk_set_parent(clks[IMX7D_SIM1_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_120M_CLK]);
 
+       imx_clk_set_parent(clks[IMX7D_UART5_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]);
+       imx_clk_set_rate(clks[IMX7D_UART5_ROOT_DIV], 80000000);
+       imx_clk_set_parent(clks[IMX7D_UART6_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]);
+       imx_clk_set_rate(clks[IMX7D_UART6_ROOT_DIV], 80000000);
+
        imx_register_uart_clocks(uart_clks);
 }
 CLK_OF_DECLARE(imx7d, "fsl,imx7d-ccm", imx7d_clocks_init);