MLK-22110: arm64: dts: Remove redundant ISI node in dts for imx815

Because IMX8MN only support one ISI channel, so we need to remove
the others which planned to support before.

Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mn.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mn.dtsi
index 97ae4d6..5eee53c 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mn.dtsi
@@ -49,9 +49,6 @@
                spi1 = &ecspi2;
                spi2 = &ecspi3;
                isi0 = &isi_0;
-               isi1 = &isi_1;
-               isi2 = &isi_2;
-               isi3 = &isi_3;
                csi0 = &mipi_csi_1;
        };
 
@@ -1036,60 +1033,6 @@
                        status = "disabled";
                };
 
-               isi_1: isi@0x32e22000 {
-                       compatible = "fsl,imx8mn-isi";
-                       reg = <0x0 0x32e22000 0x0 0x2000>;
-                       power-domains = <&dispmix_pd>;
-                       interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
-                       interface = <2 1 2>;
-                       clocks = <&clk IMX8MN_CLK_DISP_AXI>,
-                                <&clk IMX8MN_CLK_DISP_APB>,
-                                <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
-                                <&clk IMX8MN_CLK_DISP_APB_ROOT>;
-                       clock-names = "disp_axi", "disp_apb", "disp_axi_root", "disp_apb_root";
-                       assigned-clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
-                                         <&clk IMX8MN_CLK_DISP_APB_ROOT>;
-                       assigned-clock-rates = <500000000>, <200000000>;
-                       isi-gpr = <&dispmix_gpr>;
-                       status = "disabled";
-               };
-
-               isi_2: isi@0x32e24000 {
-                       compatible = "fsl,imx8mn-isi";
-                       reg = <0x0 0x32e24000 0x0 0x2000>;
-                       power-domains = <&dispmix_pd>;
-                       interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
-                       interface = <2 2 2>;
-                       clocks = <&clk IMX8MN_CLK_DISP_AXI>,
-                                <&clk IMX8MN_CLK_DISP_APB>,
-                                <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
-                                <&clk IMX8MN_CLK_DISP_APB_ROOT>;
-                       clock-names = "disp_axi", "disp_apb", "disp_axi_root", "disp_apb_root";
-                       assigned-clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
-                                         <&clk IMX8MN_CLK_DISP_APB_ROOT>;
-                       assigned-clock-rates = <500000000>, <200000000>;
-                       isi-gpr = <&dispmix_gpr>;
-                       status = "disabled";
-               };
-
-               isi_3: isi@0x32e26000 {
-                       compatible = "fsl,imx8mn-isi";
-                       reg = <0x0 0x32e26000 0x0 0x2000>;
-                       power-domains = <&dispmix_pd>;
-                       interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
-                       interface = <2 3 2>;
-                       clocks = <&clk IMX8MN_CLK_DISP_AXI>,
-                                <&clk IMX8MN_CLK_DISP_APB>,
-                                <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
-                                <&clk IMX8MN_CLK_DISP_APB_ROOT>;
-                       clock-names = "disp_axi", "disp_apb", "disp_axi_root", "disp_apb_root";
-                       assigned-clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
-                                         <&clk IMX8MN_CLK_DISP_APB_ROOT>;
-                       assigned-clock-rates = <500000000>, <200000000>;
-                       isi-gpr = <&dispmix_gpr>;
-                       status = "disabled";
-               };
-
                mipi_csi_1: csi@32e30000 {
                        compatible = "fsl,imx8mn-mipi-csi";
                        reg = <0x0 0x32e30000 0x0 0x10000>;