MLK-14617 net: fec: fix the clock count mismatch in error path
authorAndy Duan <fugang.duan@nxp.com>
Wed, 5 Apr 2017 07:15:39 +0000 (15:15 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:21:47 +0000 (15:21 -0500)
Avoid ipg clock count mismatch in error path, the issue is introduced by
the patch: "net: fec: Ensure clocks are enabled while using mdio bus".

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
drivers/net/ethernet/freescale/fec_main.c

index 7b9ed0b..1763e85 100644 (file)
@@ -3593,6 +3593,7 @@ fec_probe(struct platform_device *pdev)
                if (ret) {
                        dev_err(&pdev->dev,
                                "Failed to enable phy regulator: %d\n", ret);
+                       clk_disable_unprepare(fep->clk_ipg);
                        goto failed_regulator;
                }
        } else {
@@ -3687,7 +3688,6 @@ failed_reset:
        pm_runtime_put(&pdev->dev);
        pm_runtime_disable(&pdev->dev);
 failed_regulator:
-       clk_disable_unprepare(fep->clk_ipg);
 failed_clk_ipg:
        fec_enet_clk_enable(ndev, false);
 failed_clk: