Avoid ipg clock count mismatch in error path, the issue is introduced by
the patch: "net: fec: Ensure clocks are enabled while using mdio bus".
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
if (ret) {
dev_err(&pdev->dev,
"Failed to enable phy regulator: %d\n", ret);
+ clk_disable_unprepare(fep->clk_ipg);
goto failed_regulator;
}
} else {
pm_runtime_put(&pdev->dev);
pm_runtime_disable(&pdev->dev);
failed_regulator:
- clk_disable_unprepare(fep->clk_ipg);
failed_clk_ipg:
fec_enet_clk_enable(ndev, false);
failed_clk: