&iomuxc {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hog>;
+ pinctrl-0 = <&pinctrl_hog &pinctrl_hog_sd2_reset>;
imx6sll-lpddr3-arm2 {
pinctrl_hog: hoggrp {
MX6SLL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
MX6SLL_PAD_GPIO4_IO22__GPIO4_IO22 0x17059
MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059
- MX6SLL_PAD_SD2_RESET__GPIO4_IO27 0x417059
MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059
MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 /* SD3 CD */
MX6SLL_PAD_KEY_COL6__GPIO4_IO04 0x17059 /*SD3 RESET */
>;
};
+ pinctrl_hog_sd2_reset: hoggrp-1 {
+ fsl,pins = <
+ MX6SLL_PAD_SD2_RESET__GPIO4_IO27 0x417059
+ >;
+ };
+
pinctrl_audmux3: audmux3grp {
fsl,pins = <
MX6SLL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
pinctrl_spdif: spdifgrp {
fsl,pins = <
- MX6SLL_PAD_SD2_DATA4__SPDIF_OUT 0x4130b0
+ MX6SLL_PAD_SD2_RESET__SPDIF_OUT 0x4130b0
>;
};