LF-1189-11 arm64: dts: imx8qxp-mek: Add LCDIF pinctrl

This patch adds all pinctrl settings for LCDIF to send
out parallel display signals to externel display device.

Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index f7b6622..93631a9 100755 (executable)
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -1436,6 +1436,33 @@
                >;
        };
 
+       pinctrl_lcdif: lcdifgrp {
+               fsl,pins = <
+                       IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00        0x00000060
+                       IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01        0x00000060
+                       IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02       0x00000060
+                       IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03       0x00000060
+                       IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04        0x00000060
+                       IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05        0x00000060
+                       IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06    0x00000060
+                       IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07    0x00000060
+                       IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08    0x00000060
+                       IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09    0x00000060
+                       IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10        0x00000060
+                       IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11        0x00000060
+                       IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12   0x00000060
+                       IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13         0x00000060
+                       IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14         0x00000060
+                       IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15         0x00000060
+                       IMX8QXP_UART1_RTS_B_ADMA_LCDIF_D16      0x00000060
+                       IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17      0x00000060
+                       IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC       0x00000060
+                       IMX8QXP_SPI3_CS1_ADMA_LCDIF_RESET       0x00000060
+                       IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN          0x00000060
+                       IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC       0x00000060
+                       IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK        0x00000060
+               >;
+       };
 };
 
 &scu_key {