MLK-14536: ASoC: wm8960: Fix playback in CPU DAI master mode
authorDaniel Baluta <daniel.baluta@nxp.com>
Thu, 20 Apr 2017 15:27:42 +0000 (18:27 +0300)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:22:02 +0000 (15:22 -0500)
With the current rates for MCLK is not possible to derive bitclk
for all files in S20_3LE format and also for files with S24_LE sampled
at 48000Hz.

In order to fix this, we need to find a better MCLK value. We did this
in two steps:
1) Use params_physical_width to get rid of S20_3LE burden.
2) Brute force into all available rates which can pass fsl_sai_set_bclk
   algorithm.

Thus we found 36864000 to be the smallest acceptable rate for MCLK.

Reviewed-by: Mihai Serban <mihai.serban@nxp.com>
Suggested-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
arch/arm/boot/dts/imx6ul-14x14-evk.dts
sound/soc/fsl/imx-wm8960.c

index a2d771b..8e69239 100644 (file)
 
 &clks {
        assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-       assigned-clock-rates = <786432000>;
+       assigned-clock-rates = <1179648000>;
 };
 
 &cpu0 {
        assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
                          <&clks IMX6UL_CLK_SAI2>;
        assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-       assigned-clock-rates = <0>, <12288000>;
+       assigned-clock-rates = <0>, <36864000>;
        fsl,sai-mclk-direction-output;
        status = "okay";
 };
index 4326544..6592597 100644 (file)
@@ -225,7 +225,8 @@ static int imx_hifi_hw_params(struct snd_pcm_substream *substream,
        }
 
        if (!data->is_codec_master) {
-               ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, 0, 2, params_width(params));
+               ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, 0, 2,
+                                              params_physical_width(params));
                if (ret) {
                        dev_err(dev, "failed to set cpu dai tdm slot: %d\n", ret);
                        return ret;