According to RM, doing initialization should assert the reset domain
signals first, then enable the DSI related clocks in SCG. However,
current implementation reverses the order and we found it will cause
the MIPI_DSI_HOST_APB_PKT_IF0_DSI_HOST_IRQ_STATUS not be cleared
completely after reset. Because the IRQ mask have been cleared during
reset, then a IRQ is rised and pend in GIC and finally cause kernel
panic issue.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit
308870cac9db95fba2d20f0da7494d6a429e6644)
(cherry picked from commit
41884f0ea930ff8d6dea83e88c25830ff491be92)
#include <dm/device_compat.h>
#include <regmap.h>
#include <syscon.h>
-
+#include <asm/arch/clock.h>
#define MIPI_LCD_SLEEP_MODE_DELAY (120)
#define MIPI_FIFO_TIMEOUT 250000 /* 250ms */
writel(0x1, mipi_dsi->mmio_base + DPHY_PD_PLL);
writel(0x1, mipi_dsi->mmio_base + DPHY_PD_DPHY);
+ enable_mipi_dsi_clk(false);
+
reset_dsi_domains(mipi_dsi, true);
}
/* Assert resets */
reset_dsi_domains(mipi_dsi, true);
+ /* Enable mipi relevant clocks */
+ enable_mipi_dsi_clk(true);
+
ret = mipi_dsi_dphy_init(mipi_dsi);
if (ret < 0)
return ret;
#include <power/regulator.h>
#include <regmap.h>
#include <syscon.h>
-#include <asm/arch/clock.h>
struct nw_dsi_imx_priv {
struct mipi_dsi_device device;
return -EINVAL;
}
- enable_mipi_dsi_clk(true);
-
return ret;
}
return ret;
}
- enable_mipi_dsi_clk(false);
-
return 0;
}