drm/i915: move some leftovers to intel_pm.h from i915_drv.h
authorJani Nikula <jani.nikula@intel.com>
Mon, 29 Apr 2019 12:29:37 +0000 (15:29 +0300)
committerJani Nikula <jani.nikula@intel.com>
Tue, 30 Apr 2019 12:05:03 +0000 (15:05 +0300)
Commit 696173b064c6 ("drm/i915: extract intel_pm.h from intel_drv.h")
missed the declarations in i915_drv.h.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/770f5f1c2dd99e4d6a314b70184e71b928a6d362.1556540890.git.jani.nikula@intel.com
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_pmu.c
drivers/gpu/drm/i915/i915_sysfs.c
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_pm.h

index 6cc7495..16b2ce7 100644 (file)
@@ -3370,19 +3370,6 @@ void icl_combo_phys_uninit(struct drm_i915_private *dev_priv);
 void cnl_combo_phys_init(struct drm_i915_private *dev_priv);
 void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv);
 
-int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
-int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
-u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv,
-                          const i915_reg_t reg);
-
-u32 intel_get_cagf(struct drm_i915_private *dev_priv, u32 rpstat1);
-
-static inline u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv,
-                                        const i915_reg_t reg)
-{
-       return DIV_ROUND_UP_ULL(intel_rc6_residency_ns(dev_priv, reg), 1000);
-}
-
 #define __I915_REG_OP(op__, dev_priv__, ...) \
        intel_uncore_##op__(&(dev_priv__)->uncore, __VA_ARGS__)
 
index 35e5024..1ccda0e 100644 (file)
@@ -9,8 +9,9 @@
 
 #include "gt/intel_engine.h"
 
-#include "i915_pmu.h"
 #include "i915_drv.h"
+#include "i915_pmu.h"
+#include "intel_pm.h"
 
 /* Frequency for the sampling timer for events which need it. */
 #define FREQUENCY 200
index 9bb3a15..3ef07b9 100644 (file)
 #include <linux/stat.h>
 #include <linux/sysfs.h>
 
+#include "i915_drv.h"
 #include "intel_drv.h"
+#include "intel_pm.h"
 #include "intel_sideband.h"
-#include "i915_drv.h"
 
 static inline struct drm_i915_private *kdev_minor_to_i915(struct device *kdev)
 {
index efae44d..3da7419 100644 (file)
@@ -9904,6 +9904,12 @@ u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv,
        return mul_u64_u32_div(time_hw, mul, div);
 }
 
+u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv,
+                          i915_reg_t reg)
+{
+       return DIV_ROUND_UP_ULL(intel_rc6_residency_ns(dev_priv, reg), 1000);
+}
+
 u32 intel_get_cagf(struct drm_i915_private *dev_priv, u32 rpstat)
 {
        u32 cagf;
index 674a3f0..17339c9 100644 (file)
@@ -8,6 +8,8 @@
 
 #include <linux/types.h>
 
+#include "i915_reg.h"
+
 struct drm_atomic_state;
 struct drm_device;
 struct drm_i915_private;
@@ -68,4 +70,12 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
 void intel_init_ipc(struct drm_i915_private *dev_priv);
 void intel_enable_ipc(struct drm_i915_private *dev_priv);
 
+int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
+int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
+u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv, i915_reg_t reg);
+u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv, i915_reg_t reg);
+
+u32 intel_get_cagf(struct drm_i915_private *dev_priv, u32 rpstat1);
+
+
 #endif /* __INTEL_PM_H__ */