MLK-21646-2 arm64: fsl-imx8qm-device.dtsi: Minimize the range of LVDS regions

It turns out some registers in the 4K-byte LVDS range starting at 0x1000
as claimed by the memory map documentation are inaccessible based on tests.
Let's minimize the range to 4-byte starting at 0x10e0 to avoid exposing
the inaccessible registers via debugfs.

Signed-off-by: Liu Ying <victor.liu@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
index d86fc52..2284530 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi
@@ -1981,9 +1981,9 @@
                };
        };
 
-       lvds_region1: lvds_region@56240000 {
+       lvds_region1: lvds_region@562410e0 {
                compatible = "fsl,imx8qm-lvds-region", "syscon";
-               reg = <0x0 0x56240000 0x0 0x10000>;
+               reg = <0x0 0x562410e0 0x0 0x4>;
        };
 
        ldb1_phy: ldb_phy@56241000 {
@@ -2404,9 +2404,9 @@
                };
        };
 
-       lvds_region2: lvds_region@57240000 {
+       lvds_region2: lvds_region@572410e0 {
                compatible = "fsl,imx8qm-lvds-region", "syscon";
-               reg = <0x0 0x57240000 0x0 0x10000>;
+               reg = <0x0 0x572410e0 0x0 0x4>;
        };
 
        ldb2_phy: ldb_phy@57241000 {

diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c
index 24dfb18..50fb937 100644 (file)
--- a/drivers/gpu/drm/imx/imx-ldb.c
+++ b/drivers/gpu/drm/imx/imx-ldb.c
@@ -1073,7 +1073,7 @@ static struct devtype imx6q_ldb_devtype = {
 };
 
 static struct devtype imx8qm_ldb_devtype = {
-       .ctrl_reg = 0x10e0,
+       .ctrl_reg = 0x0,
        .bus_mux = NULL,
        .capable_10bit = true,
        .visible_phy = true,