MLK-12262-1 ARM: imx: enable ddr auto self-refresh for i.MX7D
authorAnson Huang <Anson.Huang@nxp.com>
Mon, 25 Jan 2016 14:16:48 +0000 (22:16 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 19:49:57 +0000 (14:49 -0500)
Enable DDR auto self-refresh for i.MX7D, when doing DDR
frequency scale or suspend/resume, DDR self-refresh will
be disabled, this is incorrect for saving power, enable it
for all these scenarios.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
arch/arm/mach-imx/ddr3_freq_imx7d.S
arch/arm/mach-imx/lpddr3_freq_imx.S
arch/arm/mach-imx/suspend-imx7.S

index 01ab9b0..6b706f4 100644 (file)
        ldr     r7, =0x0
        str     r7, [r4, #DDRC_DBG1]
 
+       /* enable auto self-refresh */
+       ldr     r7, [r4, #DDRC_PWRCTL]
+       orr     r7, r7, #(1 << 0)
+       str     r7, [r4, #DDRC_PWRCTL]
+
        .endm
 
        .macro  switch_to_533m
        ldr     r7, =0x0
        str     r7, [r4, #DDRC_DBG1]
 
+       /* enable auto self-refresh */
+       ldr     r7, [r4, #DDRC_PWRCTL]
+       orr     r7, r7, #(1 << 0)
+       str     r7, [r4, #DDRC_PWRCTL]
+
        .endm
 
 ENTRY(imx7d_ddr3_freq_change)
index 515e961..b122f79 100644 (file)
        ldr     r7, =0x1
        str     r7, [r4, #DDRC_PCTRL_0]
 
+       /* enable auto self-refresh */
+       ldr     r7, [r4, #DDRC_PWRCTL]
+       orr     r7, r7, #(1 << 0)
+       str     r7, [r4, #DDRC_PWRCTL]
+
        .endm
 
        .macro  switch_to_below_100m
index 074efdc..f4a4802 100644 (file)
        ldr     r7, =0x1
        str     r7, [r3, #DDRC_PCTRL_0]
 
+       /* enable auto self-refresh */
+       ldr     r7, [r3, #DDRC_PWRCTL]
+       orr     r7, r7, #(1 << 0)
+       str     r7, [r3, #DDRC_PWRCTL]
+
        .endm
 
 ENTRY(imx7_suspend)