In i.MX7ULP TPM PWM module, it has a pre-scale divider,
this divider setting is missed, so fix it.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit
3ffd915e44320a8142698ca3f6e19c30ec434f61)
/*
- * Copyright 2017 NXP.
+ * Copyright 2017-2018 NXP.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
int duty_ns, int period_ns)
{
struct tpm_pwm_chip *tpm = to_tpm_pwm_chip(chip);
- int ret, div = 0;
+ int ret, val, div = 0;
unsigned int period_cycles, duty_cycles;
unsigned long rate;
u64 c;
return ret;
}
+ /* set the pre-scale */
+ val = readl(tpm->base + TPM_SC);
+ val &= ~0x7;
+ val |= div;
+ writel(val, tpm->base + TPM_SC);
+
period_cycles = c;
c *= duty_ns;
do_div(c, period_ns);