ARM: dts: imx6sx: use nvmem-cells for cpu speed grading

On i.MX6SX, accessing OCOTP directly is wrong because the ocotp clock
needs to be enabled first, so use the nvmem-cells binding instead.

Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
(cherry picked from commit b98f7d8b72a7fce275c078a1a9c9dc12184500b5)

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index db6b675..476b201 100644 (file)
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -95,6 +95,8 @@
                                      "pll1_bypass", "pll1_bypass_src";
                        arm-supply = <&reg_arm>;
                        soc-supply = <&reg_soc>;
+                       nvmem-cells = <&cpu_speed_grade>;
+                       nvmem-cell-names = "speed_grade";
                };
        };
 
@@ -1230,6 +1232,10 @@
                                tempmon_temp_grade: temp-grade@20 {
                                        reg = <0x20 4>;
                                };
+
+                               cpu_speed_grade: speed-grade@10 {
+                                       reg = <0x10 4>;
+                               };
                        };
 
                        romcp@021ac000 {