MLK-21700-4 arm64: dts: imx8mm: Consolidate composite assigned-clocks

After consolidating 8mm composite clks we no longer have to list the mux
and div inside assigned-clocks separately for assigning rate and parent.

Separate change for easier review.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk-ak4497.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk-ak4497.dts
index 9a95dc7..95b113b 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk-ak4497.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk-ak4497.dts
@@ -66,10 +66,9 @@
        pinctrl-names = "default", "dsd";
        pinctrl-0 = <&pinctrl_sai1_pcm>;
        pinctrl-1 = <&pinctrl_sai1_dsd>;
-       assigned-clocks = <&clk IMX8MM_CLK_SAI1>,
-                       <&clk IMX8MM_CLK_SAI1>;
+       assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL2_OUT>;
-       assigned-clock-rates = <0>, <22579200>;
+       assigned-clock-rates = <22579200>;
        fsl,sai-multi-lane;
        fsl,dataline,dsd = <0 0xff 0x11>;
        dmas = <&sdma2 0 26 0>, <&sdma2 1 26 0>;

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts
index ef1ae26..a003aaa 100755 (executable)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts
@@ -800,10 +800,9 @@
                pinctrl-0 = <&pinctrl_csi_pwn>, <&pinctrl_csi_rst>;
                clocks = <&clk IMX8MM_CLK_CLKO1>;
                clock-names = "csi_mclk";
-               assigned-clocks = <&clk IMX8MM_CLK_CLKO1>,
-                                 <&clk IMX8MM_CLK_CLKO1>;
+               assigned-clocks = <&clk IMX8MM_CLK_CLKO1>;
                assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
-               assigned-clock-rates = <0>, <24000000>;
+               assigned-clock-rates = <24000000>;
                csi_id = <0>;
                pwn-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
                mclk = <24000000>;
@@ -838,10 +837,9 @@
        pinctrl-names = "default", "dsd";
        pinctrl-0 = <&pinctrl_sai1>;
        pinctrl-1 = <&pinctrl_sai1_dsd>;
-       assigned-clocks = <&clk IMX8MM_CLK_SAI1>,
-                       <&clk IMX8MM_CLK_SAI1>;
+       assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
-       assigned-clock-rates = <0>, <49152000>;
+       assigned-clock-rates = <49152000>;
        clocks = <&clk IMX8MM_CLK_SAI1_IPG>, <&clk IMX8MM_CLK_DUMMY>,
                <&clk IMX8MM_CLK_SAI1_ROOT>, <&clk IMX8MM_CLK_DUMMY>,
                <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>,
@@ -856,20 +854,18 @@
 &sai3 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sai3>;
-       assigned-clocks = <&clk IMX8MM_CLK_SAI3>,
-                       <&clk IMX8MM_CLK_SAI3>;
+       assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
-       assigned-clock-rates = <0>, <24576000>;
+       assigned-clock-rates = <24576000>;
        status = "okay";
 };
 
 &sai5 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sai5>;
-       assigned-clocks = <&clk IMX8MM_CLK_SAI5>,
-                       <&clk IMX8MM_CLK_SAI5>;
+       assigned-clocks = <&clk IMX8MM_CLK_SAI5>;
        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
-       assigned-clock-rates = <0>, <49152000>;
+       assigned-clock-rates = <49152000>;
        clocks = <&clk IMX8MM_CLK_SAI5_IPG>, <&clk IMX8MM_CLK_DUMMY>,
                <&clk IMX8MM_CLK_SAI5_ROOT>, <&clk IMX8MM_CLK_DUMMY>,
                <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>,
@@ -882,10 +878,9 @@
 &spdif1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_spdif1>;
-       assigned-clocks = <&clk IMX8MM_CLK_SPDIF1>,
-                       <&clk IMX8MM_CLK_SPDIF1>;
+       assigned-clocks = <&clk IMX8MM_CLK_SPDIF1>;
        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
-       assigned-clock-rates = <0>, <24576000>;
+       assigned-clock-rates = <24576000>;
        clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_24M>,
                <&clk IMX8MM_CLK_SPDIF1>, <&clk IMX8MM_CLK_DUMMY>,
                <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
@@ -1033,8 +1028,8 @@
 &micfil {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pdm>;
-       assigned-clocks = <&clk IMX8MM_CLK_PDM>, <&clk IMX8MM_CLK_PDM>;
+       assigned-clocks = <&clk IMX8MM_CLK_PDM>;
        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
-       assigned-clock-rates = <0>, <196608000>;
+       assigned-clock-rates = <196608000>;
        status = "okay";
 };

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi
index d1dc286..1f45a93 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi
@@ -1193,10 +1193,10 @@
 
                assigned-clocks = <&clk IMX8MM_CLK_GPU3D_SRC>, <&clk IMX8MM_CLK_GPU2D_SRC>,
                                  <&clk IMX8MM_CLK_GPU_AXI>, <&clk IMX8MM_CLK_GPU_AHB>,
-                                 <&clk IMX8MM_GPU_PLL_OUT>, <&clk IMX8MM_CLK_GPU_AHB>;
+                                 <&clk IMX8MM_GPU_PLL_OUT>;
                assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>, <&clk IMX8MM_GPU_PLL_OUT>,
                                         <&clk IMX8MM_SYS_PLL1_800M>, <&clk IMX8MM_SYS_PLL1_800M>;
-               assigned-clock-rates = <0>, <0>, <0>,<0>,<1000000000>, <400000000>;
+               assigned-clock-rates = <0>, <0>, <400000000>, <0>, <1000000000>;
 
                power-domains = <&gpumix_pd>;