drm/i915/perf: Use GTT when saving/restoring engine GPR
authorUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Thu, 9 Jul 2020 22:45:03 +0000 (23:45 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 10 Jul 2020 09:20:34 +0000 (10:20 +0100)
MI_STORE_REGISTER_MEM and MI_LOAD_REGISTER_MEM need to know which
translation to use when saving restoring the engine general purpose
registers to and from the GT scratch. Since GT scratch is mapped to
ggtt, we need to set an additional bit in the command to use GTT.

Fixes: daed3e44396d17 ("drm/i915/perf: implement active wait for noa configurations")
Suggested-by: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200709224504.11345-1-chris@chris-wilson.co.uk
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/i915_perf.c

index de69d43..c6f6370 100644 (file)
@@ -1592,6 +1592,7 @@ static u32 *save_restore_register(struct i915_perf_stream *stream, u32 *cs,
        u32 d;
 
        cmd = save ? MI_STORE_REGISTER_MEM : MI_LOAD_REGISTER_MEM;
+       cmd |= MI_SRM_LRM_GLOBAL_GTT;
        if (INTEL_GEN(stream->perf->i915) >= 8)
                cmd++;