clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Mon, 31 Aug 2020 18:37:22 +0000 (19:37 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 4 Sep 2020 07:42:01 +0000 (09:42 +0200)
VSP1 instances VSPS (which stands for "VSP Standard") and VSPR (which
stands for "VSP for Resizing") were wrongly named as "vsp1-sy" and
"vsp1-rt". The clock section in the SoC datasheets misunderstood the
abbreviations as meaning VSP System and VSP Realtime, and named the
corresponding clocks VSP1(SY) and VSP1(RT). This mistake has been
carried over to the kernel code.

This patch fixes this by renaming the clock names to "vsps" and "vspr".

Inspired from commit 79ea9934b8df ("ARM: shmobile: r8a7790: Rename
VSP1_(SY|RT) clocks to VSP1_(S|R)")

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20200831183722.8165-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7743-cpg-mssr.c
drivers/clk/renesas/r8a7745-cpg-mssr.c
drivers/clk/renesas/r8a77470-cpg-mssr.c
drivers/clk/renesas/r8a7790-cpg-mssr.c
drivers/clk/renesas/r8a7791-cpg-mssr.c
drivers/clk/renesas/r8a7792-cpg-mssr.c
drivers/clk/renesas/r8a7794-cpg-mssr.c

index c01d9af..0bba12a 100644 (file)
@@ -92,7 +92,7 @@ static const struct mssr_mod_clk r8a7743_mod_clks[] __initconst = {
        DEF_MOD("tmu0",                  125,   R8A7743_CLK_CP),
        DEF_MOD("vsp1du1",               127,   R8A7743_CLK_ZS),
        DEF_MOD("vsp1du0",               128,   R8A7743_CLK_ZS),
-       DEF_MOD("vsp1-sy",               131,   R8A7743_CLK_ZS),
+       DEF_MOD("vsps",                  131,   R8A7743_CLK_ZS),
        DEF_MOD("scifa2",                202,   R8A7743_CLK_MP),
        DEF_MOD("scifa1",                203,   R8A7743_CLK_MP),
        DEF_MOD("scifa0",                204,   R8A7743_CLK_MP),
index 493874e..dc4a64e 100644 (file)
@@ -90,7 +90,7 @@ static const struct mssr_mod_clk r8a7745_mod_clks[] __initconst = {
        DEF_MOD("cmt0",                  124,   R8A7745_CLK_R),
        DEF_MOD("tmu0",                  125,   R8A7745_CLK_CP),
        DEF_MOD("vsp1du0",               128,   R8A7745_CLK_ZS),
-       DEF_MOD("vsp1-sy",               131,   R8A7745_CLK_ZS),
+       DEF_MOD("vsps",                  131,   R8A7745_CLK_ZS),
        DEF_MOD("scifa2",                202,   R8A7745_CLK_MP),
        DEF_MOD("scifa1",                203,   R8A7745_CLK_MP),
        DEF_MOD("scifa0",                204,   R8A7745_CLK_MP),
index d81ae65..f3d6e65 100644 (file)
@@ -85,7 +85,7 @@ static const struct mssr_mod_clk r8a77470_mod_clks[] __initconst = {
        DEF_MOD("tmu2",                  122,   R8A77470_CLK_P),
        DEF_MOD("cmt0",                  124,   R8A77470_CLK_R),
        DEF_MOD("vsp1du0",               128,   R8A77470_CLK_ZS),
-       DEF_MOD("vsp1-sy",               131,   R8A77470_CLK_ZS),
+       DEF_MOD("vsps",                  131,   R8A77470_CLK_ZS),
        DEF_MOD("msiof2",                205,   R8A77470_CLK_MP),
        DEF_MOD("msiof1",                208,   R8A77470_CLK_MP),
        DEF_MOD("sys-dmac1",             218,   R8A77470_CLK_ZS),
index c57cb93..f7d233e 100644 (file)
@@ -108,8 +108,8 @@ static const struct mssr_mod_clk r8a7790_mod_clks[] __initconst = {
        DEF_MOD("tmu0",                  125,   R8A7790_CLK_CP),
        DEF_MOD("vsp1du1",               127,   R8A7790_CLK_ZS),
        DEF_MOD("vsp1du0",               128,   R8A7790_CLK_ZS),
-       DEF_MOD("vsp1-rt",               130,   R8A7790_CLK_ZS),
-       DEF_MOD("vsp1-sy",               131,   R8A7790_CLK_ZS),
+       DEF_MOD("vspr",                  130,   R8A7790_CLK_ZS),
+       DEF_MOD("vsps",                  131,   R8A7790_CLK_ZS),
        DEF_MOD("scifa2",                202,   R8A7790_CLK_MP),
        DEF_MOD("scifa1",                203,   R8A7790_CLK_MP),
        DEF_MOD("scifa0",                204,   R8A7790_CLK_MP),
index 65702de..a0de784 100644 (file)
@@ -102,7 +102,7 @@ static const struct mssr_mod_clk r8a7791_mod_clks[] __initconst = {
        DEF_MOD("tmu0",                  125,   R8A7791_CLK_CP),
        DEF_MOD("vsp1du1",               127,   R8A7791_CLK_ZS),
        DEF_MOD("vsp1du0",               128,   R8A7791_CLK_ZS),
-       DEF_MOD("vsp1-sy",               131,   R8A7791_CLK_ZS),
+       DEF_MOD("vsps",                  131,   R8A7791_CLK_ZS),
        DEF_MOD("scifa2",                202,   R8A7791_CLK_MP),
        DEF_MOD("scifa1",                203,   R8A7791_CLK_MP),
        DEF_MOD("scifa0",                204,   R8A7791_CLK_MP),
index cf8b84a..77af250 100644 (file)
@@ -88,7 +88,7 @@ static const struct mssr_mod_clk r8a7792_mod_clks[] __initconst = {
        DEF_MOD("tmu0",                  125,   R8A7792_CLK_CP),
        DEF_MOD("vsp1du1",               127,   R8A7792_CLK_ZS),
        DEF_MOD("vsp1du0",               128,   R8A7792_CLK_ZS),
-       DEF_MOD("vsp1-sy",               131,   R8A7792_CLK_ZS),
+       DEF_MOD("vsps",                  131,   R8A7792_CLK_ZS),
        DEF_MOD("msiof1",                208,   R8A7792_CLK_MP),
        DEF_MOD("sys-dmac1",             218,   R8A7792_CLK_ZS),
        DEF_MOD("sys-dmac0",             219,   R8A7792_CLK_ZS),
index c194869..4d7fa26 100644 (file)
@@ -97,7 +97,7 @@ static const struct mssr_mod_clk r8a7794_mod_clks[] __initconst = {
        DEF_MOD("cmt0",                  124,   R8A7794_CLK_R),
        DEF_MOD("tmu0",                  125,   R8A7794_CLK_CP),
        DEF_MOD("vsp1du0",               128,   R8A7794_CLK_ZS),
-       DEF_MOD("vsp1-sy",               131,   R8A7794_CLK_ZS),
+       DEF_MOD("vsps",                  131,   R8A7794_CLK_ZS),
        DEF_MOD("scifa2",                202,   R8A7794_CLK_MP),
        DEF_MOD("scifa1",                203,   R8A7794_CLK_MP),
        DEF_MOD("scifa0",                204,   R8A7794_CLK_MP),