ARM: dts: imx6ul: segin: Add boot media to dts filename

There is now a PHYTEC phyCORE-i.MX 6UL with eMMC instead of NAND flash
available. The dts filename needs to reflect that to differentiate both.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7dd2d78..2d6b2bf 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -573,7 +573,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
        imx6ul-opos6uldev.dtb \
        imx6ul-pico-hobbit.dtb \
        imx6ul-pico-pi.dtb \
-       imx6ul-phytec-segin-ff-rdk.dtb \
+       imx6ul-phytec-segin-ff-rdk-nand.dtb \
        imx6ul-tx6ul-0010.dtb \
        imx6ul-tx6ul-0011.dtb \
        imx6ul-tx6ul-mainboard.dtb \

diff --git a/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts b/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts
new file mode 100644 (file)
index 0000000..dc06029
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016 PHYTEC Messtechnik GmbH
+ * Author: Christian Hemp <c.hemp@phytec.de>
+ */
+
+/dts-v1/;
+#include "imx6ul-phytec-phycore-som.dtsi"
+#include "imx6ul-phytec-segin.dtsi"
+#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
+
+/ {
+       model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with NAND";
+       compatible = "phytec,imx6ul-pbacd10-nand", "phytec,imx6ul-pbacd10",
+                    "phytec,imx6ul-pcl063", "fsl,imx6ul";
+};
+
+&adc1 {
+       status = "okay";
+};
+
+&can1 {
+       status = "okay";
+};
+
+&tlv320 {
+       status = "okay";
+};
+
+&ecspi3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi3>;
+       cs-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};
+
+&fec2 {
+       status = "okay";
+};
+
+&i2c_rtc {
+       status = "okay";
+};
+
+&reg_can1_en {
+       status = "okay";
+};
+
+&reg_sound_1v8 {
+       status = "okay";
+};
+
+&reg_sound_3v3 {
+       status = "okay";
+};
+
+&sai2 {
+       status = "okay";
+};
+
+&sound {
+       status = "okay";
+};
+
+&uart5 {
+       status = "okay";
+};
+
+&usbotg1 {
+       status = "okay";
+};
+
+&usbotg2 {
+       status = "okay";
+};
+
+&usdhc1 {
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_ecspi3: ecspi3grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO      0x10b0
+                       MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI      0x10b0
+                       MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK    0x10b0
+                       MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20     0x10b0
+               >;
+       };
+};

diff --git a/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk.dts b/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk.dts
deleted file mode 100644 (file)
index 1e59183..0000000
--- a/arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk.dts
+++ /dev/null
@@ -1,89 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2016 PHYTEC Messtechnik GmbH
- * Author: Christian Hemp <c.hemp@phytec.de>
- */
-
-/dts-v1/;
-#include "imx6ul-phytec-phycore-som.dtsi"
-#include "imx6ul-phytec-segin.dtsi"
-#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
-
-/ {
-       model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured";
-       compatible = "phytec,imx6ul-pbacd10", "phytec,imx6ul-pcl063", "fsl,imx6ul";
-};
-
-&adc1 {
-       status = "okay";
-};
-
-&can1 {
-       status = "okay";
-};
-
-&tlv320 {
-       status = "okay";
-};
-
-&ecspi3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi3>;
-       cs-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
-       status = "okay";
-};
-
-&fec2 {
-       status = "okay";
-};
-
-&i2c_rtc {
-       status = "okay";
-};
-
-&reg_can1_en {
-       status = "okay";
-};
-
-&reg_sound_1v8 {
-       status = "okay";
-};
-
-&reg_sound_3v3 {
-       status = "okay";
-};
-
-&sai2 {
-       status = "okay";
-};
-
-&sound {
-       status = "okay";
-};
-
-&uart5 {
-       status = "okay";
-};
-
-&usbotg1 {
-       status = "okay";
-};
-
-&usbotg2 {
-       status = "okay";
-};
-
-&usdhc1 {
-       status = "okay";
-};
-
-&iomuxc {
-       pinctrl_ecspi3: ecspi3grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO      0x10b0
-                       MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI      0x10b0
-                       MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK    0x10b0
-                       MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20     0x10b0
-               >;
-       };
-};