MLK-25484 imx8mn: Set VDD_SOC suspend voltage to 0.75v

According to latest i.MX8MN datasheet, it introduces low-v suspend mode
which can set VDD_SOC to 0.75v to save power in suspend.
To align with this mode, adjust the PMIC suspend VDD_SOC to 0.75v in SPL.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>

diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c
index 3a6b47c..b8de3b0 100644 (file)
--- a/board/freescale/imx8mn_evk/spl.c
+++ b/board/freescale/imx8mn_evk/spl.c
@@ -77,8 +77,8 @@ int power_init_board(void)
        pmic_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0xf);
 #endif /* CONFIG_IMX8MN_LOW_DRIVE_MODE */
 
-       /* Set VDD_SOC 0.85v for suspend */
-       pmic_reg_write(dev, BD718XX_BUCK1_VOLT_SUSP, 0xf);
+       /* Set VDD_SOC 0.75v for low-v suspend */
+       pmic_reg_write(dev, BD718XX_BUCK1_VOLT_SUSP, 0x5);
 
        /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */
        pmic_reg_write(dev, BD718XX_4TH_NODVS_BUCK_VOLT, 0x28);
@@ -123,9 +123,9 @@ int power_init_board(void)
        /* increase VDD_SOC/VDD_DRAM to typical value 0.95V before first DRAM access */
        pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
 #endif
-       /* Set DVS1 to 0.85v for suspend */
+       /* Set DVS1 to 0.75v for low-v suspend */
        /* Enable DVS control through PMIC_STBY_REQ and set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) */
-       pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+       pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0xC);
        pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
 
        /* set VDD_SNVS_0V8 from default 0.85V */