ARM does NOT execute one instruction every cycle, the bus bandwidth,
cache status etc. would impacts the instruction execution time, so we
can NOT just calculate the delay time by ARM frequency, this patch
adjusts loop number to get a ~20us delay, measured via GPIO pin.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
ldr r7, =0xf0000
str r7, [r10]
- /* assume ARM @ 1GHz, about delay 20us */
- ldr r7, =10000
+ /* delay 20us, measured by gpio */
+ ldr r7, =20
12:
subs r7, r7, #0x1
bne 12b
ldr r7, =0x0
str r7, [r10]
- ldr r7, =10000
+ ldr r7, =20
13:
subs r7, r7, #0x1
bne 13b