imx pcie used the wrab mode to do the cached access
methods on axi bus. There is 64bytes address mis-aligned
problem.
Disable the cached operations.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
(cherry picked from commit
85db70336ab66136481926bcd7f5abe599e2aa4f)
* reserved ddr memory after write the ddr_test_region
* content to rc.
*/
- if (imx6_pcie->variant == IMX7D)
- pcie_arb_base_addr = ioremap_nocache(pp->mem_base,
- test_region_size);
- else
- pcie_arb_base_addr = ioremap_cache(pp->mem_base,
+ pcie_arb_base_addr = ioremap_nocache(pp->mem_base,
test_region_size);
if (!pcie_arb_base_addr) {