LF-531-1 arm64: dts: imx8mq/imx8mn: fix gpu setting

move gpu device configuration out of soc subsystem,
gpu parameters exceed soc range and will be skipped:
  ranges = <0x0 0x0 0x0 0x3e000000>

Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index b286acf..dbdad56 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -1280,14 +1280,16 @@
 
                gpu: gpu@38000000 {
                        compatible = "fsl,imx8mn-gpu", "fsl,imx6q-gpu";
-                       reg = <0x38000000 0x40000>, <0x40000000 0x80000000>, <0x0 0x8000000>;
+                       reg = <0x0 0x38000000 0x0 0x40000>,
+                             <0x0 0x40000000 0x0 0x80000000>,
+                             <0x0 0x0 0x0 0x8000000>;
                        reg-names = "iobase_3d", "phys_baseaddr", "contiguous_mem";
                        interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "irq_3d";
-                       clocks = <&clk IMX8MN_CLK_GPU_CORE_ROOT>,
-                       <&clk IMX8MN_CLK_GPU_SHADER_DIV>,
-                       <&clk IMX8MN_CLK_GPU_BUS_ROOT>,
-                       <&clk IMX8MN_CLK_GPU_AHB>;
+                       clocks =        <&clk IMX8MN_CLK_GPU_CORE_ROOT>,
+                                       <&clk IMX8MN_CLK_GPU_SHADER_DIV>,
+                                       <&clk IMX8MN_CLK_GPU_BUS_ROOT>,
+                                       <&clk IMX8MN_CLK_GPU_AHB>;
                        clock-names = "gpu3d_clk", "gpu3d_shader_clk", "gpu3d_axi_clk", "gpu3d_ahb_clk";
                        assigned-clocks = <&clk IMX8MN_CLK_GPU_CORE_SRC>,
                                        <&clk IMX8MN_CLK_GPU_SHADER_SRC>,
@@ -1301,8 +1303,7 @@
                                        <&clk IMX8MN_SYS_PLL1_800M>,
                                        <&clk IMX8MN_SYS_PLL1_800M>;
                        assigned-clock-rates = <0>, <0>, <800000000>, <400000000>, <1200000000>,
-                                               <600000000>, <600000000>;
-                       depth-compression = <0>;
+                                       <600000000>, <600000000>;
                        power-domains = <&gpumix_pd>;
                        status = "disabled";
                };