MLK-25314 arm64: imx8dxl: add all lpspi nodes

Add lpspi1 definition.
Add the missing lpspi0~2 interrupt definitions for imx8dxl.

Signed-off-by: pferrao <pedro.ferrao@strypes.pt>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index fd1faac..65c31e8 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -37,6 +37,24 @@ dma_subsys: bus@5a000000 {
                status = "disabled";
        };
 
+       lpspi1: spi@5a010000 {
+               compatible = "fsl,imx7ulp-spi";
+               reg = <0x5a010000 0x10000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               interrupts = <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-parent = <&gic>;
+               clocks = <&spi1_lpcg 0>,
+                        <&spi1_lpcg 1>;
+               clock-names = "per", "ipg";
+               assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
+               assigned-clock-rates = <60000000>;
+               power-domains = <&pd IMX_SC_R_SPI_1>;
+               dma-names = "tx","rx";
+               dmas = <&edma2 3 0 0>, <&edma2 2 0 1>;
+               status = "disabled";
+       }; 
+
        lpspi2: spi@5a020000 {
                compatible = "fsl,imx7ulp-spi";
                reg = <0x5a020000 0x10000>;

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
index cfd5c51..7888d29 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
@@ -183,6 +183,21 @@
        interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 };
 
+&lpspi0 {
+       compatible = "fsl,imx8dxl-spi", "fsl,imx8qxp-spi", "fsl,imx7ulp-spi";
+       interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&lpspi1 {
+       compatible = "fsl,imx8dxl-spi", "fsl,imx8qxp-spi", "fsl,imx7ulp-spi";
+       interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&lpspi2 {
+       compatible = "fsl,imx8dxl-spi", "fsl,imx8qxp-spi", "fsl,imx7ulp-spi";
+       interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
+};
+
 &lpspi3 {
        compatible = "fsl,imx8dxl-spi", "fsl,imx8qxp-spi", "fsl,imx7ulp-spi";
        interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;